Lines Matching defs:chip
63 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
70 spin_lock_irqsave(&chip->lock, flags);
71 gpiodir = readb(chip->base + GPIODIR);
73 writeb(gpiodir, chip->base + GPIODIR);
74 spin_unlock_irqrestore(&chip->lock, flags);
82 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
89 spin_lock_irqsave(&chip->lock, flags);
90 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
91 gpiodir = readb(chip->base + GPIODIR);
93 writeb(gpiodir, chip->base + GPIODIR);
99 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
100 spin_unlock_irqrestore(&chip->lock, flags);
107 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
109 return !!readb(chip->base + (1 << (offset + 2)));
114 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
116 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
121 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
123 if (chip->irq_base == (unsigned) -1)
126 return chip->irq_base + offset;
134 struct pl061_gpio *chip = get_irq_chip_data(irq);
135 int offset = irq - chip->irq_base;
139 spin_lock_irqsave(&chip->irq_lock, flags);
140 gpioie = readb(chip->base + GPIOIE);
142 writeb(gpioie, chip->base + GPIOIE);
143 spin_unlock_irqrestore(&chip->irq_lock, flags);
148 struct pl061_gpio *chip = get_irq_chip_data(irq);
149 int offset = irq - chip->irq_base;
153 spin_lock_irqsave(&chip->irq_lock, flags);
154 gpioie = readb(chip->base + GPIOIE);
156 writeb(gpioie, chip->base + GPIOIE);
157 spin_unlock_irqrestore(&chip->irq_lock, flags);
162 struct pl061_gpio *chip = get_irq_chip_data(irq);
163 int offset = irq - chip->irq_base;
170 spin_lock_irqsave(&chip->irq_lock, flags);
172 gpioiev = readb(chip->base + GPIOIEV);
174 gpiois = readb(chip->base + GPIOIS);
183 writeb(gpiois, chip->base + GPIOIS);
185 gpioibe = readb(chip->base + GPIOIBE);
195 writeb(gpioibe, chip->base + GPIOIBE);
197 writeb(gpioiev, chip->base + GPIOIEV);
199 spin_unlock_irqrestore(&chip->irq_lock, flags);
215 struct pl061_gpio *chip;
217 desc->chip->ack(irq);
222 chip = list_entry(ptr, struct pl061_gpio, list);
223 pending = readb(chip->base + GPIOMIS);
224 writeb(pending, chip->base + GPIOIC);
230 generic_handle_irq(pl061_to_irq(&chip->gc, offset));
232 desc->chip->unmask(irq);
238 struct pl061_gpio *chip;
247 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
248 if (chip == NULL)
257 chip->base = ioremap(dev->res.start, resource_size(&dev->res));
258 if (chip->base == NULL) {
263 spin_lock_init(&chip->lock);
264 spin_lock_init(&chip->irq_lock);
265 INIT_LIST_HEAD(&chip->list);
267 chip->gc.direction_input = pl061_direction_input;
268 chip->gc.direction_output = pl061_direction_output;
269 chip->gc.get = pl061_get_value;
270 chip->gc.set = pl061_set_value;
271 chip->gc.to_irq = pl061_to_irq;
272 chip->gc.base = pdata->gpio_base;
273 chip->gc.ngpio = PL061_GPIO_NR;
274 chip->gc.label = dev_name(&dev->dev);
275 chip->gc.dev = &dev->dev;
276 chip->gc.owner = THIS_MODULE;
278 chip->irq_base = pdata->irq_base;
280 ret = gpiochip_add(&chip->gc);
288 if (chip->irq_base == (unsigned) -1)
291 writeb(0, chip->base + GPIOIE); /* disable irqs */
309 list_add(&chip->list, chip_list);
313 pl061_direction_output(&chip->gc, i,
316 pl061_direction_input(&chip->gc, i);
318 set_irq_chip(i+chip->irq_base, &pl061_irqchip);
319 set_irq_handler(i+chip->irq_base, handle_simple_irq);
320 set_irq_flags(i+chip->irq_base, IRQF_VALID);
321 set_irq_chip_data(i+chip->irq_base, chip);
327 iounmap(chip->base);
331 kfree(chip);