Lines Matching refs:mci
344 static int i5100_rank_to_slot(const struct mem_ctl_info *mci,
347 const struct i5100_priv *priv = mci->pvt_info;
398 static int i5100_csrow_to_rank(const struct mem_ctl_info *mci, int csrow)
400 const struct i5100_priv *priv = mci->pvt_info;
406 static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow)
408 const struct i5100_priv *priv = mci->pvt_info;
413 static unsigned i5100_rank_to_csrow(const struct mem_ctl_info *mci,
416 const struct i5100_priv *priv = mci->pvt_info;
421 static void i5100_handle_ce(struct mem_ctl_info *mci,
430 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
436 csrow, mci->csrows[csrow].channels[0].label, msg);
438 mci->ce_count++;
439 mci->csrows[csrow].ce_count++;
440 mci->csrows[csrow].channels[0].ce_count++;
443 static void i5100_handle_ue(struct mem_ctl_info *mci,
452 const int csrow = i5100_rank_to_csrow(mci, chan, rank);
458 csrow, mci->csrows[csrow].channels[0].label, msg);
460 mci->ue_count++;
461 mci->csrows[csrow].ue_count++;
464 static void i5100_read_log(struct mem_ctl_info *mci, int chan,
467 struct i5100_priv *priv = mci->pvt_info;
505 i5100_handle_ce(mci, chan, bank, rank, syndrome, cas, ras, msg);
525 i5100_handle_ue(mci, chan, bank, rank, syndrome, cas, ras, msg);
531 static void i5100_check_error(struct mem_ctl_info *mci)
533 struct i5100_priv *priv = mci->pvt_info;
547 i5100_read_log(mci, i5100_ferr_nf_mem_chan_indx(dw),
588 static int i5100_set_scrub_rate(struct mem_ctl_info *mci, u32 bandwidth)
590 struct i5100_priv *priv = mci->pvt_info;
613 static int i5100_get_scrub_rate(struct mem_ctl_info *mci,
616 struct i5100_priv *priv = mci->pvt_info;
645 static unsigned long __devinit i5100_npages(struct mem_ctl_info *mci,
648 struct i5100_priv *priv = mci->pvt_info;
649 const unsigned chan_rank = i5100_csrow_to_rank(mci, csrow);
650 const unsigned chan = i5100_csrow_to_chan(mci, csrow);
667 static void __devinit i5100_init_mtr(struct mem_ctl_info *mci)
669 struct i5100_priv *priv = mci->pvt_info;
695 static int i5100_read_spd_byte(const struct mem_ctl_info *mci,
698 struct i5100_priv *priv = mci->pvt_info;
728 static void __devinit i5100_init_dimm_csmap(struct mem_ctl_info *mci)
730 struct i5100_priv *priv = mci->pvt_info;
759 struct mem_ctl_info *mci)
761 struct i5100_priv *priv = mci->pvt_info;
770 if (i5100_read_spd_byte(mci, i, j, 5, &rank) < 0)
777 i5100_init_dimm_csmap(mci);
781 struct mem_ctl_info *mci)
785 struct i5100_priv *priv = mci->pvt_info;
823 i5100_init_mtr(mci);
826 static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
830 struct i5100_priv *priv = mci->pvt_info;
832 for (i = 0; i < mci->nr_csrows; i++) {
833 const unsigned long npages = i5100_npages(mci, i);
834 const unsigned chan = i5100_csrow_to_chan(mci, i);
835 const unsigned rank = i5100_csrow_to_rank(mci, i);
840 mci->csrows[i].first_page = total_pages;
841 mci->csrows[i].last_page = total_pages + npages - 1;
842 mci->csrows[i].page_mask = 0UL;
844 mci->csrows[i].nr_pages = npages;
845 mci->csrows[i].grain = 32;
846 mci->csrows[i].csrow_idx = i;
847 mci->csrows[i].dtype =
849 mci->csrows[i].ue_count = 0;
850 mci->csrows[i].ce_count = 0;
851 mci->csrows[i].mtype = MEM_RDDR2;
852 mci->csrows[i].edac_mode = EDAC_SECDED;
853 mci->csrows[i].mci = mci;
854 mci->csrows[i].nr_channels = 1;
855 mci->csrows[i].channels[0].chan_idx = 0;
856 mci->csrows[i].channels[0].ce_count = 0;
857 mci->csrows[i].channels[0].csrow = mci->csrows + i;
858 snprintf(mci->csrows[i].channels[0].label,
859 sizeof(mci->csrows[i].channels[0].label),
860 "DIMM%u", i5100_rank_to_slot(mci, chan, rank));
870 struct mem_ctl_info *mci;
931 mci = edac_mc_alloc(sizeof(*priv), ranksperch * 2, 1, 0);
932 if (!mci) {
937 mci->dev = &pdev->dev;
939 priv = mci->pvt_info;
955 i5100_init_dimm_layout(pdev, mci);
956 i5100_init_interleaving(pdev, mci);
958 mci->mtype_cap = MEM_FLAG_FB_DDR2;
959 mci->edac_ctl_cap = EDAC_FLAG_SECDED;
960 mci->edac_cap = EDAC_FLAG_SECDED;
961 mci->mod_name = "i5100_edac.c";
962 mci->mod_ver = "not versioned";
963 mci->ctl_name = "i5100";
964 mci->dev_name = pci_name(pdev);
965 mci->ctl_page_to_phys = NULL;
967 mci->edac_check = i5100_check_error;
968 mci->set_sdram_scrub_rate = i5100_set_scrub_rate;
969 mci->get_sdram_scrub_rate = i5100_get_scrub_rate;
971 i5100_init_csrows(mci);
983 if (edac_mc_add_mc(mci)) {
993 edac_mc_free(mci);
1016 struct mem_ctl_info *mci;
1019 mci = edac_mc_del_mc(&pdev->dev);
1021 if (!mci)
1024 priv = mci->pvt_info;
1035 edac_mc_free(mci);