Lines Matching defs:ppc440spe_chan
1692 * Caller must hold &ppc440spe_chan->lock while calling this function
2077 struct ppc440spe_adma_chan *ppc440spe_chan;
2083 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2084 init = ppc440spe_chan->slots_allocated ? 0 : 1;
2085 chan->chan_id = ppc440spe_chan->device->id;
2088 i = ppc440spe_chan->slots_allocated;
2089 if (ppc440spe_chan->device->id != PPC440SPE_XOR_ID)
2094 for (; i < (ppc440spe_chan->device->pool_size / db_sz); i++) {
2103 hw_desc = (char *) ppc440spe_chan->device->dma_desc_pool_virt;
2110 slot->phys = ppc440spe_chan->device->dma_desc_pool + i * db_sz;
2113 spin_lock_bh(&ppc440spe_chan->lock);
2114 ppc440spe_chan->slots_allocated++;
2115 list_add_tail(&slot->slot_node, &ppc440spe_chan->all_slots);
2116 spin_unlock_bh(&ppc440spe_chan->lock);
2119 if (i && !ppc440spe_chan->last_used) {
2120 ppc440spe_chan->last_used =
2121 list_entry(ppc440spe_chan->all_slots.next,
2126 dev_dbg(ppc440spe_chan->device->common.dev,
2128 ppc440spe_chan->device->id, i);
2132 switch (ppc440spe_chan->device->id) {
2135 ppc440spe_chan->hw_chain_inited = 0;
2138 ppc440spe_r6_tchan = ppc440spe_chan;
2141 ppc440spe_chan_start_null_xor(ppc440spe_chan);
2146 ppc440spe_chan->needs_unmap = 1;
2275 struct ppc440spe_adma_chan *ppc440spe_chan;
2279 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2281 dev_dbg(ppc440spe_chan->device->common.dev,
2282 "ppc440spe adma%d: %s\n", ppc440spe_chan->device->id,
2285 spin_lock_bh(&ppc440spe_chan->lock);
2287 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2291 ppc440spe_desc_init_interrupt(group_start, ppc440spe_chan);
2295 spin_unlock_bh(&ppc440spe_chan->lock);
2307 struct ppc440spe_adma_chan *ppc440spe_chan;
2311 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2318 spin_lock_bh(&ppc440spe_chan->lock);
2320 dev_dbg(ppc440spe_chan->device->common.dev,
2322 ppc440spe_chan->device->id, __func__, len,
2325 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2332 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2336 spin_unlock_bh(&ppc440spe_chan->lock);
2348 struct ppc440spe_adma_chan *ppc440spe_chan;
2352 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2359 spin_lock_bh(&ppc440spe_chan->lock);
2361 dev_dbg(ppc440spe_chan->device->common.dev,
2363 ppc440spe_chan->device->id, __func__, value, len,
2367 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2373 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2377 spin_unlock_bh(&ppc440spe_chan->lock);
2390 struct ppc440spe_adma_chan *ppc440spe_chan;
2394 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2396 ADMA_LL_DBG(prep_dma_xor_dbg(ppc440spe_chan->device->id,
2402 dev_dbg(ppc440spe_chan->device->common.dev,
2404 ppc440spe_chan->device->id, __func__, src_cnt, len,
2407 spin_lock_bh(&ppc440spe_chan->lock);
2409 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2418 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2422 spin_unlock_bh(&ppc440spe_chan->lock);
2453 struct ppc440spe_adma_chan *ppc440spe_chan,
2464 spin_lock_bh(&ppc440spe_chan->lock);
2467 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2497 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2523 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2528 spin_unlock_bh(&ppc440spe_chan->lock);
2539 struct ppc440spe_adma_chan *ppc440spe_chan,
2550 spin_lock_bh(&ppc440spe_chan->lock);
2553 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2578 ppc440spe_chan->qdest, 1);
2581 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2602 ppc440spe_chan->qdest);
2607 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2632 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2637 spin_unlock_bh(&ppc440spe_chan->lock);
2643 struct ppc440spe_adma_chan *ppc440spe_chan,
2746 spin_lock_bh(&ppc440spe_chan->lock);
2748 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2778 ppc440spe_chan, len);
2782 spin_unlock_bh(&ppc440spe_chan->lock);
2788 struct ppc440spe_adma_chan *ppc440spe_chan,
2801 spin_lock_bh(&ppc440spe_chan->lock);
2804 spin_unlock_bh(&ppc440spe_chan->lock);
2811 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2818 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
2868 spin_unlock_bh(&ppc440spe_chan->lock);
2881 struct ppc440spe_adma_chan *ppc440spe_chan;
2885 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2887 ADMA_LL_DBG(prep_dma_pq_dbg(ppc440spe_chan->device->id,
2899 dest[1] = ppc440spe_chan->qdest;
2900 sw_desc = ppc440spe_dma01_prep_mult(ppc440spe_chan,
2906 sw_desc = ppc440spe_dma01_prep_sum_product(ppc440spe_chan,
2925 dev_dbg(ppc440spe_chan->device->common.dev,
2927 ppc440spe_chan->device->id, __func__, src_cnt, len,
2930 switch (ppc440spe_chan->device->id) {
2933 sw_desc = ppc440spe_dma01_prep_pq(ppc440spe_chan,
2939 sw_desc = ppc440spe_dma2_prep_pq(ppc440spe_chan,
2957 struct ppc440spe_adma_chan *ppc440spe_chan;
2962 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2974 ADMA_LL_DBG(prep_dma_pqzero_sum_dbg(ppc440spe_chan->device->id,
2988 spin_lock_bh(&ppc440spe_chan->lock);
2989 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2997 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
3017 ppc440spe_chan->pdest, 0);
3019 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
3023 pdest = ppc440spe_chan->pdest;
3049 ppc440spe_chan->qdest, 0);
3051 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
3055 qdest = ppc440spe_chan->qdest;
3094 ppc440spe_desc_set_dcheck(iter, ppc440spe_chan,
3123 spin_unlock_bh(&ppc440spe_chan->lock);
3904 struct ppc440spe_adma_chan *ppc440spe_chan;
3908 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
3909 ppc440spe_adma_slot_cleanup(ppc440spe_chan);
3911 spin_lock_bh(&ppc440spe_chan->lock);
3912 list_for_each_entry_safe(iter, _iter, &ppc440spe_chan->chain,
3918 &ppc440spe_chan->all_slots, slot_node) {
3921 ppc440spe_chan->slots_allocated--;
3923 ppc440spe_chan->last_used = NULL;
3925 dev_dbg(ppc440spe_chan->device->common.dev,
3927 ppc440spe_chan->device->id,
3928 __func__, ppc440spe_chan->slots_allocated);
3929 spin_unlock_bh(&ppc440spe_chan->lock);
3946 struct ppc440spe_adma_chan *ppc440spe_chan;
3951 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
3953 last_complete = ppc440spe_chan->completed_cookie;
3961 ppc440spe_adma_slot_cleanup(ppc440spe_chan);
3964 last_complete = ppc440spe_chan->completed_cookie;
4017 struct ppc440spe_adma_chan *ppc440spe_chan;
4019 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
4020 dev_dbg(ppc440spe_chan->device->common.dev,
4021 "ppc440spe adma%d: %s %d \n", ppc440spe_chan->device->id,
4022 __func__, ppc440spe_chan->pending);
4024 if (ppc440spe_chan->pending) {
4025 ppc440spe_chan->pending = 0;
4026 ppc440spe_chan_append(ppc440spe_chan);
4635 struct ppc440spe_adma_chan *ppc440spe_chan;
4645 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
4646 ppc440spe_adma_release_irqs(adev, ppc440spe_chan);
4647 tasklet_kill(&ppc440spe_chan->irq_tasklet);
4649 dma_unmap_page(&ofdev->dev, ppc440spe_chan->pdest,
4651 dma_unmap_page(&ofdev->dev, ppc440spe_chan->qdest,
4653 __free_page(ppc440spe_chan->pdest_page);
4654 __free_page(ppc440spe_chan->qdest_page);
4658 if (ppc440spe_chan ==
4665 kfree(ppc440spe_chan);