Lines Matching refs:dma
62 #include <linux/dma-mapping.h>
65 #include "dma.h"
256 * handles extended descriptors and dma-unmapping raid operations.
862 struct dma_device *dma = &device->common;
866 if (!dma_has_cap(DMA_XOR, dma->cap_mask))
900 dma_chan = container_of(dma->channels.next, struct dma_chan,
902 if (dma->device_alloc_chan_resources(dma_chan) < 1) {
912 tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs,
932 dma->device_issue_pending(dma_chan);
936 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) {
967 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
986 dma->device_issue_pending(dma_chan);
990 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) {
1009 tx = dma->device_prep_dma_memset(dma_chan, dma_addr, 0, PAGE_SIZE,
1027 dma->device_issue_pending(dma_chan);
1031 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) {
1051 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
1070 dma->device_issue_pending(dma_chan);
1074 if (dma->device_tx_status(dma_chan, cookie, NULL) != DMA_SUCCESS) {
1087 dma->device_free_chan_resources(dma_chan);
1150 struct dma_device *dma;
1160 dma = &device->common;
1161 dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
1162 dma->device_issue_pending = ioat2_issue_pending;
1163 dma->device_alloc_chan_resources = ioat2_alloc_chan_resources;
1164 dma->device_free_chan_resources = ioat2_free_chan_resources;
1166 dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
1167 dma->device_prep_dma_interrupt = ioat3_prep_interrupt_lock;
1177 dma->max_xor = 8;
1178 dma->xor_align = 6;
1180 dma_cap_set(DMA_XOR, dma->cap_mask);
1181 dma->device_prep_dma_xor = ioat3_prep_xor;
1183 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
1184 dma->device_prep_dma_xor_val = ioat3_prep_xor_val;
1188 dma_set_maxpq(dma, 8, 0);
1189 dma->pq_align = 6;
1191 dma_cap_set(DMA_PQ, dma->cap_mask);
1192 dma->device_prep_dma_pq = ioat3_prep_pq;
1194 dma_cap_set(DMA_PQ_VAL, dma->cap_mask);
1195 dma->device_prep_dma_pq_val = ioat3_prep_pq_val;
1198 dma->max_xor = 8;
1199 dma->xor_align = 6;
1201 dma_cap_set(DMA_XOR, dma->cap_mask);
1202 dma->device_prep_dma_xor = ioat3_prep_pqxor;
1204 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
1205 dma->device_prep_dma_xor_val = ioat3_prep_pqxor_val;
1209 dma_cap_set(DMA_MEMSET, dma->cap_mask);
1210 dma->device_prep_dma_memset = ioat3_prep_memset_lock;
1215 dma->device_tx_status = ioat3_tx_status;
1219 dma->device_tx_status = ioat_dma_tx_status;
1225 dma_cap_clear(DMA_PQ_VAL, dma->cap_mask);
1226 dma->device_prep_dma_pq_val = NULL;
1230 dma_cap_clear(DMA_XOR_VAL, dma->cap_mask);
1231 dma->device_prep_dma_xor_val = NULL;
1239 list_for_each_entry(c, &dma->channels, device_node) {