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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/

Lines Matching defs:virtbase

47 	void __iomem *virtbase;
252 void __iomem *virtbase = cohc->base->virtbase;
255 virtbase + COH901318_CX_CTRL +
263 void __iomem *virtbase = cohc->base->virtbase;
266 virtbase + COH901318_CX_CFG +
276 void __iomem *virtbase = cohc->base->virtbase;
280 val = readl(virtbase + COH901318_CX_CFG +
285 writel(val, virtbase + COH901318_CX_CFG +
295 void __iomem *virtbase = cohc->base->virtbase;
297 BUG_ON(readl(virtbase + COH901318_CX_STAT +
302 virtbase + COH901318_CX_SRC_ADDR +
305 writel(lli->dst_addr, virtbase +
309 writel(lli->link_addr, virtbase + COH901318_CX_LNK_ADDR +
312 writel(lli->control, virtbase + COH901318_CX_CTRL +
465 left = readl(cohc->base->virtbase +
471 ladd = readl(cohc->base->virtbase +
523 void __iomem *virtbase = cohc->base->virtbase;
528 val = readl(virtbase + COH901318_CX_CFG +
538 writel(val, virtbase + COH901318_CX_CFG +
540 writel(val, virtbase + COH901318_CX_CFG +
544 while (readl(virtbase + COH901318_CX_STAT+COH901318_CX_STAT_SPACING *
549 if ((readl(virtbase + COH901318_CX_CTRL+COH901318_CX_CTRL_SPACING *
574 val = readl(cohc->base->virtbase + COH901318_CX_CFG +
579 writel(val, cohc->base->virtbase + COH901318_CX_CFG +
608 void __iomem *virtbase = cohc->base->virtbase;
619 writel(1 << channel, virtbase + COH901318_BE_INT_CLEAR1);
620 writel(1 << channel, virtbase + COH901318_TC_INT_CLEAR1);
622 writel(1 << (channel - 32), virtbase +
624 writel(1 << (channel - 32), virtbase +
800 void __iomem *virtbase = base->virtbase;
802 status1 = readl(virtbase + COH901318_INT_STATUS1);
803 status2 = readl(virtbase + COH901318_INT_STATUS2);
825 if (test_bit(i, virtbase + COH901318_BE_INT_STATUS1)) {
830 __set_bit(i, virtbase + COH901318_BE_INT_CLEAR1);
833 if (unlikely(!test_bit(i, virtbase +
839 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
842 if (!(readl(virtbase + COH901318_CX_STAT +
852 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
871 if (test_bit(i, virtbase + COH901318_BE_INT_STATUS2)) {
876 __set_bit(i, virtbase + COH901318_BE_INT_CLEAR2);
879 if (unlikely(!test_bit(i, virtbase +
884 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
888 if (!(readl(virtbase + COH901318_CX_STAT +
897 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
941 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CFG +
943 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CTRL +
1344 void __iomem *virtbase = cohc->base->virtbase;
1373 writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
1374 writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
1376 writel(1 << (cohc->id - 32), virtbase +
1378 writel(1 << (cohc->id - 32), virtbase +
1482 base->virtbase = ioremap(io->start, resource_size(io));
1483 if (!base->virtbase) {
1560 (u32) base->virtbase);
1572 iounmap(base->virtbase);
1592 iounmap(base->virtbase);