Lines Matching defs:set
40 * is set for the device). The functionality is determined by which
211 u32 max_frame_size; /* as set by device config */
829 unsigned int set, unsigned int clear);
842 /* set non-zero on successful registration with PCI subsystem */
1392 /* for diagnostics set IRQ flag */
1965 /* if port data rate is set to 460800 or less then
2482 * set the serial parameters
2549 /* mgsl_set_txidle() service ioctl to set transmit idle mode
2873 /* set modem control signals (DTR/RTS)
2876 unsigned int set, unsigned int clear)
2883 __FILE__,__LINE__,info->device_name, set, clear);
2885 if (set & TIOCM_RTS)
2887 if (set & TIOCM_DTR)
2904 * break_state -1=set break condition, 0=clear
3297 /* nonblock mode is set or port is not enabled */
3687 * A buffer list is a set of buffer entries where each entry contains
4651 * modern chips. If an underrun occurs and this bit is set,
4725 /* set up receive address filtering */
5045 outw( BIT8, info->io_base ); /* set Master Bus Enable (DCAR) */
5233 /* set Internal Data loopback mode */
5339 /* count set to zero) but there is no terminiting buffer */
5340 /* (status set to non-zero). */
5356 /* Status field has been set by 16C32. */
5564 /* RTS and set a flag indicating that the driver should */
5923 * Note: For async mode the receive FIFO level must be set
6171 * transmitter has been set to Monosync in order to try to mimic
6174 * patterns to the idle mode set here
6222 /* set serial signal bits to reflect MISR */
6381 * buffer is available for use and set the current buffer to the
6423 * and set the current buffer to the first buffer. This effectively
6464 /* field and set the count field to DMA Buffer Size. */
6487 /* set current buffer to next buffer after last buffer of frame */
6515 * field is set by the 16C32 after completing a receive frame.
6583 * set to 0xffff) minus the ending value of the RCC (decremented
6710 * receive frame. The status field is set by the 16C32 after
6756 * set to 0xffff) minus the ending value of the RCC (decremented
6874 /* set CMR:13 to start transmit when
6912 /* Also set the data count for this individual DMA buffer. */
7119 /* clear status, set max receive buffer size */
7611 /* set CMR:13 to insert into loop on next GoAhead (RxAbort) */
7627 * set encoding and frame check sequence (FCS) options
7859 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
8086 * LCR base address bit 7 is set. Maintain shadow