Lines Matching refs:CCR1
270 #define CCR1 0x2d
2984 /* CCR1
2995 write_reg(info, CHB + CCR1, 0x17);
3040 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3041 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3042 write_reg(info, CHA + CCR1, val);
3143 /* CCR1
3155 write_reg(info, CHA + CCR1, val);
3473 /* CCR1
3482 write_reg(info, CHA + CCR1, 0x1f);
3605 set_reg_bits(info, CHA + CCR1, BIT3);
3607 clear_reg_bits(info, CHA + CCR1, BIT3);