Lines Matching refs:MODE
254 #define MODE 0x22
2953 /* MODE
2970 write_reg(info, CHB + MODE, val);
3054 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3055 val = read_reg(info, CHA + MODE) | BIT0;
3056 write_reg(info, CHA + MODE, val);
3094 /* MODE
3113 write_reg(info, CHA + MODE, val);
3305 /* MODE:03 RAC Receiver Active, 0=inactive */
3306 clear_reg_bits(info, CHA + MODE, BIT3);
3322 /* MODE:03 RAC Receiver Active, 1=active */
3323 set_reg_bits(info, CHA + MODE, BIT3);
3385 write_reg(info, CHA + MODE, 0);
3386 write_reg(info, CHB + MODE, 0);
3439 /* MODE
3459 write_reg(info, CHA + MODE, val);
3582 /* MODE:03 RAC Receiver Active, 1=active */
3583 set_reg_bits(info, CHA + MODE, BIT3);
3638 val = read_reg(info, CHA + MODE);
3650 write_reg(info, CHA + MODE, val);