Lines Matching refs:ctrl_dl
274 struct ctrl_dl {
334 struct ctrl_dl {
357 struct ctrl_dl ctrl_dl;
689 memset(&dc->port[i].ctrl_dl, 0, sizeof(struct ctrl_dl));
933 struct ctrl_dl ctrl_dl;
934 struct ctrl_dl old_ctrl;
937 read_mem32((u32 *) &ctrl_dl, dc->port[PORT_CTRL].dl_addr[CH_A], 2);
939 switch (ctrl_dl.port) {
975 DBG1("0x%04X->0x%04X", *((u16 *)&dc->port[port].ctrl_dl),
976 *((u16 *)&ctrl_dl));
978 old_ctrl = dc->port[port].ctrl_dl;
979 dc->port[port].ctrl_dl = ctrl_dl;
981 if (old_ctrl.CTS == 1 && ctrl_dl.CTS == 0) {
986 } else if (old_ctrl.CTS == 0 && ctrl_dl.CTS == 1) {
999 if (*(u16 *)&old_ctrl == *(u16 *)&ctrl_dl) {
1004 if (old_ctrl.CTS != ctrl_dl.CTS)
1006 if (old_ctrl.DSR != ctrl_dl.DSR)
1008 if (old_ctrl.RI != ctrl_dl.RI)
1010 if (old_ctrl.DCD != ctrl_dl.DCD)
1711 if (port->ctrl_dl.CTS) {
1756 const struct ctrl_dl *ctrl_dl = &port->ctrl_dl;
1763 (ctrl_dl->DCD ? TIOCM_CAR : 0) |
1764 (ctrl_dl->RI ? TIOCM_RNG : 0) |
1765 (ctrl_dl->DSR ? TIOCM_DSR : 0) |
1766 (ctrl_dl->CTS ? TIOCM_CTS : 0);