Lines Matching refs:baseio
291 static void mxser_enable_must_enchance_mode(unsigned long baseio)
296 oldlcr = inb(baseio + UART_LCR);
297 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
299 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
302 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
303 outb(oldlcr, baseio + UART_LCR);
306 static void mxser_disable_must_enchance_mode(unsigned long baseio)
311 oldlcr = inb(baseio + UART_LCR);
312 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
317 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
318 outb(oldlcr, baseio + UART_LCR);
321 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
326 oldlcr = inb(baseio + UART_LCR);
327 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
329 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
333 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
334 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
335 outb(oldlcr, baseio + UART_LCR);
338 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
343 oldlcr = inb(baseio + UART_LCR);
344 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
346 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
350 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
351 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
352 outb(oldlcr, baseio + UART_LCR);
374 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
379 oldlcr = inb(baseio + UART_LCR);
380 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
382 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
386 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
387 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
388 outb(oldlcr, baseio + UART_LCR);
391 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
396 oldlcr = inb(baseio + UART_LCR);
397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
405 outb(oldlcr, baseio + UART_LCR);
408 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
413 oldlcr = inb(baseio + UART_LCR);
414 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
416 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
419 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
420 outb(oldlcr, baseio + UART_LCR);
423 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
428 oldlcr = inb(baseio + UART_LCR);
429 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
431 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
435 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
436 outb(oldlcr, baseio + UART_LCR);
439 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
444 oldlcr = inb(baseio + UART_LCR);
445 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
447 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
450 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
451 outb(oldlcr, baseio + UART_LCR);
454 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
459 oldlcr = inb(baseio + UART_LCR);
460 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
462 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
466 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
467 outb(oldlcr, baseio + UART_LCR);
470 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
475 oldlcr = inb(baseio + UART_LCR);
476 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
478 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
481 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
482 outb(oldlcr, baseio + UART_LCR);