Lines Matching defs:temp
24 u32 temp;
27 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
28 temp &= ~(0xfffffff0);
32 if (temp == values[i].size_value) {
45 u32 temp;
47 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
48 temp &= 0xfffffff0;
49 temp |= (1<<0 | 1<<1);
50 pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, temp);
56 u32 temp;
60 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
63 ((temp & 0xffffff00) | 0x00000001|0x00000002));
65 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
67 ((temp & 0x00000ff0) | previous_size->size_value));
72 u32 temp;
78 pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp);
79 temp = (((temp & 0x00000ff0) | (agp_bridge->gatt_bus_addr & 0xfffff000))
81 pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, temp);
84 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
85 pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) | 0x00000010));
88 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
89 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
92 pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp);
93 temp &= 0xffffff7f; //enable TLB
94 pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, temp);
103 u32 temp;
110 &temp);
112 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
121 u32 temp;
126 pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
128 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
146 u32 temp;
154 pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp);
156 (((temp & ALI_CACHE_FLUSH_ADDR_MASK) |