Lines Matching refs:iobase
113 static int btuart_write(unsigned int iobase, int fifo_size, __u8 *buf, int len)
118 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE))
124 outb(buf[actual], iobase + UART_TX);
145 register unsigned int iobase = info->p_dev->resource[0]->start;
158 len = btuart_write(iobase, 16, skb->data, skb->len);
178 unsigned int iobase;
186 iobase = info->p_dev->resource[0]->start;
204 bt_cb(info->rx_skb)->pkt_type = inb(iobase + UART_RX);
237 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX);
284 } while (inb(iobase + UART_LSR) & UART_LSR_DR);
291 unsigned int iobase;
300 iobase = info->p_dev->resource[0]->start;
304 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
309 lsr = inb(iobase + UART_LSR);
334 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
347 unsigned int iobase;
357 iobase = info->p_dev->resource[0]->start;
362 outb(0, iobase + UART_IER);
382 outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
383 outb(divisor & 0xff, iobase + UART_DLL); /* Set speed */
384 outb(divisor >> 8, iobase + UART_DLM);
385 outb(lcr, iobase + UART_LCR); /* Set 8N1 */
386 outb(fcr, iobase + UART_FCR); /* Enable FIFO's */
389 outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
481 unsigned int iobase = info->p_dev->resource[0]->start;
517 outb(0, iobase + UART_MCR);
520 outb(0, iobase + UART_IER);
523 outb(UART_LCR_WLEN8, iobase + UART_LCR); /* Reset DLAB */
524 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase + UART_MCR);
527 // outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
551 unsigned int iobase = info->p_dev->resource[0]->start;
562 outb(0, iobase + UART_MCR);
565 outb(0, iobase + UART_IER);