Lines Matching refs:hrz_dev
370 static inline void wr_regl (const hrz_dev * dev, unsigned char reg, u32 data) {
374 static inline u32 rd_regl (const hrz_dev * dev, unsigned char reg) {
378 static inline void wr_regw (const hrz_dev * dev, unsigned char reg, u16 data) {
382 static inline u16 rd_regw (const hrz_dev * dev, unsigned char reg) {
386 static inline void wrs_regb (const hrz_dev * dev, unsigned char reg, void * addr, u32 len) {
390 static inline void rds_regb (const hrz_dev * dev, unsigned char reg, void * addr, u32 len) {
397 static inline void wr_mem (const hrz_dev * dev, HDW * addr, u32 data) {
403 static inline u32 rd_mem (const hrz_dev * dev, HDW * addr) {
409 static inline void wr_framer (const hrz_dev * dev, u32 addr, u32 data) {
414 static inline u32 rd_framer (const hrz_dev * dev, u32 addr) {
423 static inline void FLUSH_RX_CHANNEL (hrz_dev * dev, u16 channel) {
428 static void WAIT_FLUSH_RX_COMPLETE (hrz_dev * dev) {
434 static inline void SELECT_RX_CHANNEL (hrz_dev * dev, u16 channel) {
439 static void WAIT_UPDATE_COMPLETE (hrz_dev * dev) {
447 static inline void SELECT_TX_CHANNEL (hrz_dev * dev, u16 tx_channel) {
454 static inline void update_tx_channel_config (hrz_dev * dev, short chan, u8 mode, u16 value) {
461 static inline u16 query_tx_channel_config (hrz_dev * dev, short chan, u8 mode) {
485 static inline void dump_regs (hrz_dev * dev) {
499 static inline void dump_framer (hrz_dev * dev) {
602 static int make_rate (const hrz_dev * dev, u32 c, rounding r,
709 static int make_rate_with_tolerance (const hrz_dev * dev, u32 c, rounding r, unsigned int tol,
734 static int hrz_open_rx (hrz_dev * dev, u16 channel) {
803 static void hrz_close_rx (hrz_dev * dev, u16 vc) {
916 static void rx_schedule (hrz_dev * dev, int irq) {
1010 static void rx_bus_master_complete_handler (hrz_dev * dev) {
1023 static int tx_hold (hrz_dev * dev) {
1035 static inline void tx_release (hrz_dev * dev) {
1043 static void tx_schedule (hrz_dev * const dev, int irq) {
1153 static void tx_bus_master_complete_handler (hrz_dev * dev) {
1167 static u32 rx_queue_entry_next (hrz_dev * dev) {
1182 static inline void rx_disabled_handler (hrz_dev * dev) {
1191 static void rx_data_av_handler (hrz_dev * dev) {
1305 hrz_dev *dev = dev_id;
1363 hrz_dev * dev = (hrz_dev *) arg;
1379 static short setup_idle_tx_channel (hrz_dev * dev, hrz_vcc * vcc) {
1491 hrz_dev * dev = HRZ_DEV(atm_vcc->dev);
1645 static void hrz_reset (const hrz_dev * dev) {
1666 static void WRITE_IT_WAIT (const hrz_dev *dev, u32 ctrl)
1672 static void CLOCK_IT (const hrz_dev *dev, u32 ctrl)
1679 static u16 __devinit read_bia (const hrz_dev * dev, u16 addr)
1735 static int __devinit hrz_init (hrz_dev * dev) {
2026 hrz_dev * dev = HRZ_DEV(atm_vcc->dev);
2303 hrz_dev * dev = HRZ_DEV(atm_vcc->dev);
2359 hrz_dev * dev = HRZ_DEV(atm_dev);
2397 hrz_dev * dev;
2416 dev = kzalloc(sizeof(hrz_dev), GFP_KERNEL);
2550 hrz_dev *dev;