Lines Matching refs:mmio
553 void __iomem *mmio = pp->ctl_block;
560 status = readw(mmio + NV_ADMA_STAT);
563 status = readw(mmio + NV_ADMA_STAT);
571 tmp = readw(mmio + NV_ADMA_CTL);
572 writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);
575 status = readw(mmio + NV_ADMA_STAT);
578 status = readw(mmio + NV_ADMA_STAT);
592 void __iomem *mmio = pp->ctl_block;
601 tmp = readw(mmio + NV_ADMA_CTL);
602 writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);
604 status = readw(mmio + NV_ADMA_STAT);
608 status = readw(mmio + NV_ADMA_STAT);
879 void __iomem *mmio = pp->ctl_block;
907 notifier = readl(mmio + NV_ADMA_NOTIFIER);
908 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR);
918 status = readw(mmio + NV_ADMA_STAT);
926 writew(status, mmio + NV_ADMA_STAT);
927 readw(mmio + NV_ADMA_STAT); /* flush posted write */
1003 void __iomem *mmio = pp->ctl_block;
1016 tmp = readw(mmio + NV_ADMA_CTL);
1018 mmio + NV_ADMA_CTL);
1019 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1025 void __iomem *mmio = pp->ctl_block;
1034 tmp = readw(mmio + NV_ADMA_CTL);
1036 mmio + NV_ADMA_CTL);
1037 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1043 void __iomem *mmio = pp->ctl_block;
1056 writew(0xffff, mmio + NV_ADMA_STAT);
1088 void __iomem *mmio;
1112 mmio = ap->host->iomap[NV_MMIO_BAR] + NV_ADMA_PORT +
1114 pp->ctl_block = mmio;
1142 writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
1143 writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
1157 writew(0xffff, mmio + NV_ADMA_STAT);
1163 writew(0, mmio + NV_ADMA_CPB_COUNT);
1166 tmp = readw(mmio + NV_ADMA_CTL);
1168 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
1170 tmp = readw(mmio + NV_ADMA_CTL);
1171 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1172 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1174 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1175 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1183 void __iomem *mmio = pp->ctl_block;
1186 writew(0, mmio + NV_ADMA_CTL);
1193 void __iomem *mmio = pp->ctl_block;
1199 writew(0, mmio + NV_ADMA_CPB_COUNT);
1202 writew(0, mmio + NV_ADMA_CTL);
1210 void __iomem *mmio = pp->ctl_block;
1214 writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
1215 writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
1218 writew(0xffff, mmio + NV_ADMA_STAT);
1224 writew(0, mmio + NV_ADMA_CPB_COUNT);
1227 tmp = readw(mmio + NV_ADMA_CTL);
1229 NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
1231 tmp = readw(mmio + NV_ADMA_CTL);
1232 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1233 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1235 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1236 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1244 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
1249 mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE;
1251 ioport->cmd_addr = mmio;
1252 ioport->data_addr = mmio + (ATA_REG_DATA * 4);
1254 ioport->feature_addr = mmio + (ATA_REG_ERR * 4);
1255 ioport->nsect_addr = mmio + (ATA_REG_NSECT * 4);
1256 ioport->lbal_addr = mmio + (ATA_REG_LBAL * 4);
1257 ioport->lbam_addr = mmio + (ATA_REG_LBAM * 4);
1258 ioport->lbah_addr = mmio + (ATA_REG_LBAH * 4);
1259 ioport->device_addr = mmio + (ATA_REG_DEVICE * 4);
1261 ioport->command_addr = mmio + (ATA_REG_STATUS * 4);
1263 ioport->ctl_addr = mmio + 0x20;
1394 void __iomem *mmio = pp->ctl_block;
1430 writew(qc->tag, mmio + NV_ADMA_APPEND);
1635 void __iomem *mmio = pp->ctl_block;
1640 u32 notifier = readl(mmio + NV_ADMA_NOTIFIER);
1641 u32 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR);
1643 u32 status = readw(mmio + NV_ADMA_STAT);
1644 u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT);
1645 u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX);
1673 writew(0, mmio + NV_ADMA_CPB_COUNT);
1676 tmp = readw(mmio + NV_ADMA_CTL);
1677 writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1678 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1680 writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
1681 readw(mmio + NV_ADMA_CTL); /* flush posted write */
1816 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
1820 writel(~0, mmio + NV_INT_STATUS_MCP55);
1823 writel(0, mmio + NV_INT_ENABLE_MCP55);
1826 tmp = readl(mmio + NV_CTL_MCP55);
1828 writel(tmp, mmio + NV_CTL_MCP55);
1835 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
1839 writel(~0, mmio + NV_INT_STATUS_MCP55);
1842 writel(0x00fd00fd, mmio + NV_INT_ENABLE_MCP55);
1845 tmp = readl(mmio + NV_CTL_MCP55);
1846 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55);
1855 void __iomem *mmio = host->iomap[NV_MMIO_BAR];
1865 tmp = readl(mmio + NV_CTL_MCP55);
1867 writel(tmp | NV_CTL_PRI_SWNCQ | NV_CTL_SEC_SWNCQ, mmio + NV_CTL_MCP55);
1870 tmp = readl(mmio + NV_INT_ENABLE_MCP55);
1872 writel(tmp | 0x00fd00fd, mmio + NV_INT_ENABLE_MCP55);
1875 writel(~0x0, mmio + NV_INT_STATUS_MCP55);
1927 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
1948 pp->irq_block = mmio + NV_INT_STATUS_MCP55 + ap->port_no * 2;
1949 pp->tag_block = mmio + NV_NCQ_REG_MCP55 + ap->port_no * 2;