Lines Matching refs:at1
35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rsr \at1, ACCLO // MAC16 accumulator
43 s32i \at1, \ptr, .Lxchal_ofs_ + 0
49 rsr \at1, M0 // MAC16 registers
51 s32i \at1, \ptr, .Lxchal_ofs_ + 0
53 rsr \at1, M2
55 s32i \at1, \ptr, .Lxchal_ofs_ + 8
61 rsr \at1, SCOMPARE1 // conditional store option
62 s32i \at1, \ptr, .Lxchal_ofs_ + 0
67 rur \at1, THREADPTR // threadptr option
68 s32i \at1, \ptr, .Lxchal_ofs_ + 0
76 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
78 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
82 l32i \at1, \ptr, .Lxchal_ofs_ + 0
84 wsr \at1, ACCLO // MAC16 accumulator
90 l32i \at1, \ptr, .Lxchal_ofs_ + 0
92 wsr \at1, M0 // MAC16 registers
94 l32i \at1, \ptr, .Lxchal_ofs_ + 8
96 wsr \at1, M2
102 l32i \at1, \ptr, .Lxchal_ofs_ + 0
103 wsr \at1, SCOMPARE1 // conditional store option
108 l32i \at1, \ptr, .Lxchal_ofs_ + 0
109 wur \at1, THREADPTR // threadptr option