Lines Matching refs:arch
193 svm->vcpu.arch.hflags |= HF_GIF_MASK;
198 svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
203 return !!(svm->vcpu.arch.hflags & HF_GIF_MASK);
297 vcpu->arch.efer = efer;
809 svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
815 svm->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
816 (void)kvm_set_cr0(&svm->vcpu, svm->vcpu.arch.cr0);
836 svm->vcpu.arch.hflags = 0;
854 svm->vmcb->save.cs.base = svm->vcpu.arch.sipi_vector << 12;
855 svm->vmcb->save.cs.selector = svm->vcpu.arch.sipi_vector << 8;
857 vcpu->arch.regs_avail = ~0;
858 vcpu->arch.regs_dirty = ~0;
918 svm->vcpu.arch.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
920 svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
965 delta = vcpu->arch.host_tsc - native_read_tsc();
988 vcpu->arch.host_tsc = native_read_tsc();
1006 load_pdptrs(vcpu, vcpu->arch.cr3);
1160 ulong gcr0 = svm->vcpu.arch.cr0;
1207 old = vcpu->arch.cr0 & SVM_CR0_SELECTIVE_MASK;
1223 if (vcpu->arch.efer & EFER_LME) {
1225 vcpu->arch.efer |= EFER_LMA;
1230 vcpu->arch.efer &= ~EFER_LMA;
1235 vcpu->arch.cr0 = cr0;
1260 vcpu->arch.cr4 = cr4;
1322 svm->vmcb->save.dr7 = dbg->arch.debugreg[7];
1324 svm->vmcb->save.dr7 = vcpu->arch.dr7;
1398 kvm_run->debug.arch.pc =
1400 kvm_run->debug.arch.exception = DB_VECTOR;
1412 kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
1413 kvm_run->debug.arch.exception = BP_VECTOR;
1594 if (!(svm->vcpu.arch.efer & EFER_SVME)
1619 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
1634 if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
1637 if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
1729 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
1908 nested_vmcb->save.cr3 = svm->vcpu.arch.cr3;
1910 nested_vmcb->save.cr4 = svm->vcpu.arch.cr4;
1949 if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
1971 svm->vcpu.arch.cr3 = hsave->save.cr3;
2062 hsave->save.efer = svm->vcpu.arch.efer;
2064 hsave->save.cr4 = svm->vcpu.arch.cr4;
2072 hsave->save.cr3 = svm->vcpu.arch.cr3;
2077 svm->vcpu.arch.hflags |= HF_HIF_MASK;
2079 svm->vcpu.arch.hflags &= ~HF_HIF_MASK;
2094 svm->vcpu.arch.cr3 = nested_vmcb->save.cr3;
2101 svm->vmcb->save.cr2 = svm->vcpu.arch.cr2 = nested_vmcb->save.cr2;
2128 svm->vcpu.arch.hflags |= HF_VINTR_MASK;
2130 svm->vcpu.arch.hflags &= ~HF_VINTR_MASK;
2132 if (svm->vcpu.arch.hflags & HF_VINTR_MASK) {
2295 trace_kvm_invlpga(svm->vmcb->save.rip, vcpu->arch.regs[VCPU_REGS_RCX],
2296 vcpu->arch.regs[VCPU_REGS_RAX]);
2299 kvm_mmu_invlpg(vcpu, vcpu->arch.regs[VCPU_REGS_RAX]);
2308 trace_kvm_skinit(svm->vmcb->save.rip, svm->vcpu.arch.regs[VCPU_REGS_RAX]);
2350 svm->vcpu.arch.nmi_injected = false;
2396 svm->vcpu.arch.hflags |= HF_IRET_MASK;
2523 u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
2532 svm->vcpu.arch.regs[VCPU_REGS_RAX] = data & 0xffffffff;
2533 svm->vcpu.arch.regs[VCPU_REGS_RDX] = data >> 32;
2559 if (svm_dis && (vcpu->arch.efer & EFER_SVME))
2643 u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
2644 u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u)
2645 | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32);
2857 vcpu->arch.cr0 = svm->vmcb->save.cr0;
2859 vcpu->arch.cr3 = svm->vmcb->save.cr3;
2940 vcpu->arch.hflags |= HF_NMI_MASK;
2962 trace_kvm_inj_virq(vcpu->arch.interrupt.nr);
2965 svm->vmcb->control.event_inj = vcpu->arch.interrupt.nr |
2973 if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK))
2989 !(svm->vcpu.arch.hflags & HF_NMI_MASK);
2999 return !!(svm->vcpu.arch.hflags & HF_NMI_MASK);
3007 svm->vcpu.arch.hflags |= HF_NMI_MASK;
3010 svm->vcpu.arch.hflags &= ~HF_NMI_MASK;
3028 return ret && !(svm->vcpu.arch.hflags & HF_VINTR_MASK);
3053 if ((svm->vcpu.arch.hflags & (HF_NMI_MASK | HF_IRET_MASK))
3084 if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK))
3098 if (is_nested(svm) && (vcpu->arch.hflags & HF_VINTR_MASK))
3115 if (svm->vcpu.arch.hflags & HF_IRET_MASK)
3116 svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK);
3118 svm->vcpu.arch.nmi_injected = false;
3130 svm->vcpu.arch.nmi_injected = true;
3174 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
3175 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
3176 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
3193 svm->vmcb->save.cr2 = vcpu->arch.cr2;
3196 svm->vmcb->save.cr3 = vcpu->arch.cr3;
3250 [rbx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RBX])),
3251 [rcx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RCX])),
3252 [rdx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RDX])),
3253 [rsi]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RSI])),
3254 [rdi]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RDI])),
3255 [rbp]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RBP]))
3257 , [r8]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R8])),
3258 [r9]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R9])),
3259 [r10]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R10])),
3260 [r11]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R11])),
3261 [r12]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R12])),
3262 [r13]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R13])),
3263 [r14]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R14])),
3264 [r15]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R15]))
3273 vcpu->arch.cr2 = svm->vmcb->save.cr2;
3274 vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
3275 vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
3276 vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
3299 vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR);
3300 vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR);