Lines Matching refs:dir0_lsn
183 unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0;
204 dir0_lsn = dir0 & 0xf; /* model or clock multiplier */
220 p = Cx486_name[dir0_lsn & 7];
224 p = (dir0_lsn & 8) ? Cx486D_name[dir0_lsn & 5]
225 : Cx486S_name[dir0_lsn & 3];
229 Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5];
235 Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5];
289 Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4';
303 tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0;
304 Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7];
313 switch (dir0_lsn) {