Lines Matching defs:ireg
34 struct biosregs ireg, oreg;
42 initregs(&ireg);
43 ireg.ax = 0x4f00;
44 ireg.di = (size_t)&vginfo;
45 intcall(0x10, &ireg, &oreg);
66 ireg.ax = 0x4f01;
67 ireg.cx = mode;
68 ireg.di = (size_t)&vminfo;
69 intcall(0x10, &ireg, &oreg);
107 struct biosregs ireg, oreg;
113 initregs(&ireg);
114 ireg.ax = 0x4f01;
115 ireg.cx = vesa_mode;
116 ireg.di = (size_t)&vminfo;
117 intcall(0x10, &ireg, &oreg);
136 initregs(&ireg);
137 ireg.ax = 0x4f02;
138 ireg.bx = vesa_mode;
139 intcall(0x10, &ireg, &oreg);
164 struct biosregs ireg, oreg;
169 initregs(&ireg);
170 ireg.ax = 0x4f08;
171 ireg.bh = 0x08;
172 intcall(0x10, &ireg, &oreg);
192 struct biosregs ireg, oreg;
194 initregs(&ireg);
195 ireg.ax = 0x4f0a;
196 intcall(0x10, &ireg, &oreg);
240 struct biosregs ireg, oreg;
248 initregs(&ireg);
249 ireg.ax = 0x4f15; /* VBE DDC */
250 /* ireg.bx = 0x0000; */ /* Report DDC capabilities */
251 /* ireg.cx = 0; */ /* Controller 0 */
252 ireg.es = 0; /* ES:DI must be 0 by spec */
253 intcall(0x10, &ireg, &oreg);
261 ireg.ax = 0x4f15; /* VBE DDC */
262 ireg.bx = 0x0001; /* Read EDID */
263 /* ireg.cx = 0; */ /* Controller 0 */
264 /* ireg.dx = 0; */ /* EDID block number */
265 ireg.es = ds();
266 ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
267 intcall(0x10, &ireg, &oreg);