Lines Matching refs:glob_tmp
43 #define glob_tmp g5 /* Global temporary reg, usable anywhere G */
52 spnwin_patch1_7win: sll %t_wim, 6, %glob_tmp
53 spnwin_patch2_7win: and %glob_tmp, 0x7f, %glob_tmp
84 spnwin_patch1: sll %t_wim, 7, %glob_tmp
85 or %glob_tmp, %twin_tmp, %glob_tmp
86 spnwin_patch2: and %glob_tmp, 0xff, %glob_tmp
102 andn %twin_tmp, %glob_tmp, %twin_tmp ! compute new uwinmask
110 wr %glob_tmp, 0x0, %wim ! set new %wim, this is safe now
119 mov %saved_g5, %g5 ! restore %glob_tmp
136 * %glob_tmp. We cannot set the new %wim first because we
147 wr %glob_tmp, 0x0, %wim ! Now it is safe to set new %wim
207 rd %psr, %glob_tmp
208 andcc %glob_tmp, PSR_PS, %g0
274 SAVE_BOLIXED_USER_STACK(curptr, glob_tmp)
295 * make usage of glob_tmp and t_psr so we leave them defined.
316 sra %sp, 29, %glob_tmp
318 rd %psr, %glob_tmp
323 add %glob_tmp, 0x1, %glob_tmp
324 andncc %glob_tmp, 0x1, %g0
326 and %sp, 0xfff, %glob_tmp ! delay slot
328 rd %psr, %glob_tmp
336 add %glob_tmp, 0x38, %glob_tmp
337 andncc %glob_tmp, 0xff8, %g0
339 lda [%sp] ASI_PTE, %glob_tmp ! have to check first page anyways
343 srl %glob_tmp, 29, %glob_tmp
344 cmp %glob_tmp, 0x6
346 add %sp, 0x38, %glob_tmp /* Is second page in vma hole? */
348 rd %psr, %glob_tmp
353 sra %glob_tmp, 29, %glob_tmp
354 add %glob_tmp, 0x1, %glob_tmp
355 andncc %glob_tmp, 0x1, %g0
357 add %sp, 0x38, %glob_tmp
359 rd %psr, %glob_tmp
364 lda [%glob_tmp] ASI_PTE, %glob_tmp
367 srl %glob_tmp, 29, %glob_tmp
368 cmp %glob_tmp, 0x6 ! can user write to it?
372 rd %psr, %glob_tmp
397 sethi %hi(PAGE_OFFSET), %glob_tmp
398 cmp %glob_tmp, %sp
400 mov AC_M_SFSR, %glob_tmp
403 lda [%glob_tmp] ASI_M_MMUREGS, %g0 ! eat SFSR
405 lda [%g0] ASI_M_MMUREGS, %glob_tmp ! read MMU control
406 or %glob_tmp, 0x2, %glob_tmp ! or in no_fault bit
407 sta %glob_tmp, [%g0] ASI_M_MMUREGS ! set it
413 andn %glob_tmp, 0x2, %glob_tmp
414 sta %glob_tmp, [%g0] ASI_M_MMUREGS
416 mov AC_M_SFAR, %glob_tmp
417 lda [%glob_tmp] ASI_M_MMUREGS, %g0
419 mov AC_M_SFSR, %glob_tmp
420 lda [%glob_tmp] ASI_M_MMUREGS, %glob_tmp
421 andcc %glob_tmp, 0x2, %g0 ! did we fault?
425 rd %psr, %glob_tmp