Lines Matching refs:g4
14 /* Head offset in %g2, tail offset in %g4.
19 mov INTRQ_CPU_MONDO_TAIL, %g4
20 ldxa [%g4] ASI_QUEUE, %g4
21 cmp %g2, %g4
25 /* Get &trap_block[smp_processor_id()] into %g4. */
26 ldxa [%g0] ASI_SCRATCHPAD, %g4
27 sub %g4, TRAP_PER_CPU_FAULT_INFO, %g4
30 ldx [%g4 + TRAP_PER_CPU_CPU_MONDO_PA], %g7
50 lduw [%g4 + TRAP_PER_CPU_CPU_MONDO_QMASK], %g4
51 and %g2, %g4, %g2
53 mov INTRQ_CPU_MONDO_HEAD, %g4
54 stxa %g2, [%g4] ASI_QUEUE
64 /* Head offset in %g2, tail offset in %g4. */
67 mov INTRQ_DEVICE_MONDO_TAIL, %g4
68 ldxa [%g4] ASI_QUEUE, %g4
69 cmp %g2, %g4
73 /* Get &trap_block[smp_processor_id()] into %g4. */
74 ldxa [%g0] ASI_SCRATCHPAD, %g4
75 sub %g4, TRAP_PER_CPU_FAULT_INFO, %g4
78 ldx [%g4 + TRAP_PER_CPU_DEV_MONDO_PA], %g5
86 lduw [%g4 + TRAP_PER_CPU_DEV_MONDO_QMASK], %g4
87 and %g2, %g4, %g2
89 mov INTRQ_DEVICE_MONDO_HEAD, %g4
90 stxa %g2, [%g4] ASI_QUEUE
93 TRAP_LOAD_IRQ_WORK_PA(%g1, %g4)
97 xnor %g3, %g0, %g4
99 /* Get __pa(&ivector_table[IVEC]) into %g4. */
100 sethi %hi(ivector_table_pa), %g4
101 ldx [%g4 + %lo(ivector_table_pa)], %g4
103 add %g4, %g3, %g4
106 stxa %g2, [%g4] ASI_PHYS_USE_EC
107 stx %g4, [%g1]
116 /* Head offset in %g2, tail offset in %g4. */
119 mov INTRQ_RESUM_MONDO_TAIL, %g4
120 ldxa [%g4] ASI_QUEUE, %g4
121 cmp %g2, %g4
140 lduw [%g3 + TRAP_PER_CPU_RESUM_QMASK], %g4
172 and %g2, %g4, %g2
174 mov INTRQ_RESUM_MONDO_HEAD, %g4
175 stxa %g2, [%g4] ASI_QUEUE
179 * C code. The etrap handling will leave %g4 in %l4 for us
184 mov %g1, %g4
209 stxa %g4, [%g2] ASI_QUEUE
227 /* Head offset in %g2, tail offset in %g4. */
230 mov INTRQ_NONRESUM_MONDO_TAIL, %g4
231 ldxa [%g4] ASI_QUEUE, %g4
232 cmp %g2, %g4
251 lduw [%g3 + TRAP_PER_CPU_NONRESUM_QMASK], %g4
283 and %g2, %g4, %g2
285 mov INTRQ_NONRESUM_MONDO_HEAD, %g4
286 stxa %g2, [%g4] ASI_QUEUE
290 * C code. The etrap handling will leave %g4 in %l4 for us
295 mov %g1, %g4
320 stxa %g4, [%g2] ASI_QUEUE