Lines Matching refs:REG2
98 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \
99 661: casa [TSB] ASI_N, REG1, REG2; \
102 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
105 #define TSB_CAS_TAG(TSB, REG1, REG2) \
106 661: casxa [TSB] ASI_N, REG1, REG2; \
109 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
119 #define TSB_LOCK_TAG(TSB, REG1, REG2) \
121 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
122 andcc REG1, REG2, %g0; \
125 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \
126 cmp REG1, REG2; \
142 #define KTSB_LOCK_TAG(TSB, REG1, REG2) \
144 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
145 andcc REG1, REG2, %g0; \
148 casa [TSB] ASI_N, REG1, REG2;\
149 cmp REG1, REG2; \
161 * VADDR will not be clobbered, but REG2 will.
163 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \
166 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
167 srlx REG2, 64 - PAGE_SHIFT, REG2; \
168 andn REG2, 0x3, REG2; \
169 lduw [REG1 + REG2], REG1; \
171 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
172 srlx REG2, 64 - PAGE_SHIFT, REG2; \
174 andn REG2, 0x3, REG2; \
175 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
177 sllx VADDR, 64 - PMD_SHIFT, REG2; \
178 srlx REG2, 64 - PAGE_SHIFT, REG2; \
180 andn REG2, 0x7, REG2; \
181 add REG1, REG2, REG1;
188 * VADDR will not be clobbered, but REG1 and REG2 will.
190 #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL) \
191 sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \
192 srlx REG2, 64 - PAGE_SHIFT, REG2; \
193 andn REG2, 0x3, REG2; \
194 lduwa [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
196 sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
197 srlx REG2, 64 - PAGE_SHIFT, REG2; \
199 andn REG2, 0x3, REG2; \
200 lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
202 sllx VADDR, 64 - PMD_SHIFT, REG2; \
203 srlx REG2, 64 - PAGE_SHIFT, REG2; \
205 andn REG2, 0x7, REG2; \
206 add REG1, REG2, REG1;
213 #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \
216 97: ldx [REG1 + 0x00], REG2; \
217 brz,pn REG2, FAIL_LABEL; \
220 add REG2, REG3, REG3; \
221 cmp REG2, VADDR; \
226 sub VADDR, REG2, REG2; \
228 add REG3, REG2, REG1; \
243 * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries
249 #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
252 srlx VADDR, PAGE_SHIFT, REG2; \
253 and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
254 sllx REG2, 4, REG2; \
255 add REG1, REG2, REG2; \
256 KTSB_LOAD_QUAD(REG2, REG3); \
265 #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
268 and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
269 sllx REG2, 4, REG2; \
270 add REG1, REG2, REG2; \
271 KTSB_LOAD_QUAD(REG2, REG3); \