Lines Matching refs:mstp_clks
167 static struct clk mstp_clks[HWBLK_NR] = {
249 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
250 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
251 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
252 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
253 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
254 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
255 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
256 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
257 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
258 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
259 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
260 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
265 .clk = &mstp_clks[HWBLK_TMU0],
270 .clk = &mstp_clks[HWBLK_TMU0],
275 .clk = &mstp_clks[HWBLK_TMU0],
280 .clk = &mstp_clks[HWBLK_TMU1],
282 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
283 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
284 CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
289 .clk = &mstp_clks[HWBLK_TMU1],
294 .clk = &mstp_clks[HWBLK_TMU1],
299 .clk = &mstp_clks[HWBLK_SCIF0],
304 .clk = &mstp_clks[HWBLK_SCIF1],
309 .clk = &mstp_clks[HWBLK_SCIF2],
314 .clk = &mstp_clks[HWBLK_SCIF3],
319 .clk = &mstp_clks[HWBLK_SCIF4],
324 .clk = &mstp_clks[HWBLK_SCIF5],
326 CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
327 CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
328 CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
329 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
330 CLKDEV_CON_ID("i2c0", &mstp_clks[HWBLK_IIC0]),
331 CLKDEV_CON_ID("i2c1", &mstp_clks[HWBLK_IIC1]),
332 CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
333 CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
334 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
335 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
336 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
337 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
338 CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
339 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
340 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
341 CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
342 CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
343 CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
344 CLKDEV_CON_ID("ceu1", &mstp_clks[HWBLK_CEU1]),
345 CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
346 CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
347 CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
348 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
349 CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
350 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
351 CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU0]),
352 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
353 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
354 CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
379 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);