Lines Matching refs:hardfpu
77 :"0"((char *)(&tsk->thread.xstate->hardfpu.status)),
223 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
225 denormal_to_double(&tsk->thread.xstate->hardfpu,
241 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
242 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
243 fpscr = tsk->thread.xstate->hardfpu.fpscr;
253 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
255 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
257 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
258 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
264 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
279 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
280 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
281 fpscr = tsk->thread.xstate->hardfpu.fpscr;
291 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
293 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
298 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
299 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
308 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
323 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
324 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
325 fpscr = tsk->thread.xstate->hardfpu.fpscr;
335 | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
337 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
341 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
342 tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
348 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
361 hx = tsk->thread.xstate->hardfpu.fp_regs[m];
363 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
368 llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32)
369 | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
371 tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx);
390 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
402 tsk->thread.xstate->hardfpu.fpscr &=
404 tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
407 tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
411 if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &