Lines Matching refs:control_regs
73 per_info->control_regs.bits.em_instruction_fetch =
77 per_info->control_regs.bits.starting_addr = 0;
80 per_info->control_regs.bits.ending_addr = 0x7fffffffUL;
83 per_info->control_regs.bits.ending_addr = PSW_ADDR_INSN;
85 per_info->control_regs.bits.starting_addr =
87 per_info->control_regs.bits.ending_addr =
94 if (per_info->control_regs.words.cr[0] & PER_EM_MASK)
99 if (per_info->control_regs.bits.em_storage_alteration)
100 per_info->control_regs.bits.storage_alt_space_ctl = 1;
102 per_info->control_regs.bits.storage_alt_space_ctl = 0;
106 if (memcmp(&cr_words, &per_info->control_regs.words,
108 __ctl_load(per_info->control_regs.words, 9, 11);
471 if ((offset >= (addr_t) &dummy_per32->control_regs &&
472 offset < (addr_t) (&dummy_per32->control_regs + 1)) ||
574 if ((offset >= (addr_t) &dummy_per32->control_regs &&
575 offset < (addr_t) (&dummy_per32->control_regs + 1)) ||