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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/powerpc/xmon/

Lines Matching refs:XRC

1670 #define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))
1676 #define X_MASK XRC (0x3f, 0x3ff, 1)
2035 { "mulchw", XRC(4,168,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2036 { "mulchw.", XRC(4,168,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2037 { "mulchwu", XRC(4,136,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2038 { "mulchwu.", XRC(4,136,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2039 { "mulhhw", XRC(4,40,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2040 { "mulhhw.", XRC(4,40,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2041 { "mulhhwu", XRC(4,8,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2042 { "mulhhwu.", XRC(4,8,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2043 { "mullhw", XRC(4,424,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2044 { "mullhw.", XRC(4,424,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2045 { "mullhwu", XRC(4,392,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2046 { "mullhwu.", XRC(4,392,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
3407 { "slw", XRC(31,24,0), X_MASK, PPCCOM, { RA, RS, RB } },
3408 { "sl", XRC(31,24,0), X_MASK, PWRCOM, { RA, RS, RB } },
3409 { "slw.", XRC(31,24,1), X_MASK, PPCCOM, { RA, RS, RB } },
3410 { "sl.", XRC(31,24,1), X_MASK, PWRCOM, { RA, RS, RB } },
3412 { "cntlzw", XRC(31,26,0), XRB_MASK, PPCCOM, { RA, RS } },
3413 { "cntlz", XRC(31,26,0), XRB_MASK, PWRCOM, { RA, RS } },
3414 { "cntlzw.", XRC(31,26,1), XRB_MASK, PPCCOM, { RA, RS } },
3415 { "cntlz.", XRC(31,26,1), XRB_MASK, PWRCOM, { RA, RS } },
3417 { "sld", XRC(31,27,0), X_MASK, PPC64, { RA, RS, RB } },
3418 { "sld.", XRC(31,27,1), X_MASK, PPC64, { RA, RS, RB } },
3420 { "and", XRC(31,28,0), X_MASK, COM, { RA, RS, RB } },
3421 { "and.", XRC(31,28,1), X_MASK, COM, { RA, RS, RB } },
3423 { "maskg", XRC(31,29,0), X_MASK, M601, { RA, RS, RB } },
3424 { "maskg.", XRC(31,29,1), X_MASK, M601, { RA, RS, RB } },
3455 { "cntlzd", XRC(31,58,0), XRB_MASK, PPC64, { RA, RS } },
3456 { "cntlzd.", XRC(31,58,1), XRB_MASK, PPC64, { RA, RS } },
3458 { "andc", XRC(31,60,0), X_MASK, COM, { RA, RS, RB } },
3459 { "andc.", XRC(31,60,1), X_MASK, COM, { RA, RS, RB } },
3483 { "dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440, { RA, RS, RB } },
3484 { "dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440, { RA, RS, RB } },
3519 { "not", XRC(31,124,0), X_MASK, COM, { RA, RS, RBS } },
3520 { "nor", XRC(31,124,0), X_MASK, COM, { RA, RS, RB } },
3521 { "not.", XRC(31,124,1), X_MASK, COM, { RA, RS, RBS } },
3522 { "nor.", XRC(31,124,1), X_MASK, COM, { RA, RS, RB } },
3560 { "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA0, RB } },
3565 { "stwcxe.", XRC(31,158,1), X_MASK, BOOKE64, { RS, RA0, RB } },
3569 { "slq", XRC(31,152,0), X_MASK, M601, { RA, RS, RB } },
3570 { "slq.", XRC(31,152,1), X_MASK, M601, { RA, RS, RB } },
3572 { "sle", XRC(31,153,0), X_MASK, M601, { RA, RS, RB } },
3573 { "sle.", XRC(31,153,1), X_MASK, M601, { RA, RS, RB } },
3589 { "sliq", XRC(31,184,0), X_MASK, M601, { RA, RS, SH } },
3590 { "sliq.", XRC(31,184,1), X_MASK, M601, { RA, RS, SH } },
3616 { "stdcx.", XRC(31,214,1), X_MASK, PPC64, { RS, RA0, RB } },
3620 { "sllq", XRC(31,216,0), X_MASK, M601, { RA, RS, RB } },
3621 { "sllq.", XRC(31,216,1), X_MASK, M601, { RA, RS, RB } },
3623 { "sleq", XRC(31,217,0), X_MASK, M601, { RA, RS, RB } },
3624 { "sleq.", XRC(31,217,1), X_MASK, M601, { RA, RS, RB } },
3670 { "slliq", XRC(31,248,0), X_MASK, M601, { RA, RS, SH } },
3671 { "slliq.", XRC(31,248,1), X_MASK, M601, { RA, RS, SH } },
3697 { "lscbx", XRC(31,277,0), X_MASK, M601, { RT, RA, RB } },
3698 { "lscbx.", XRC(31,277,1), X_MASK, M601, { RT, RA, RB } },
3704 { "eqv", XRC(31,284,0), X_MASK, COM, { RA, RS, RB } },
3705 { "eqv.", XRC(31,284,1), X_MASK, COM, { RA, RS, RB } },
3718 { "xor", XRC(31,316,0), X_MASK, COM, { RA, RS, RB } },
3719 { "xor.", XRC(31,316,1), X_MASK, COM, { RA, RS, RB } },
4017 { "orc", XRC(31,412,0), X_MASK, COM, { RA, RS, RB } },
4018 { "orc.", XRC(31,412,1), X_MASK, COM, { RA, RS, RB } },
4033 { "mr", XRC(31,444,0), X_MASK, COM, { RA, RS, RBS } },
4034 { "or", XRC(31,444,0), X_MASK, COM, { RA, RS, RB } },
4035 { "mr.", XRC(31,444,1), X_MASK, COM, { RA, RS, RBS } },
4036 { "or.", XRC(31,444,1), X_MASK, COM, { RA, RS, RB } },
4246 { "nand", XRC(31,476,0), X_MASK, COM, { RA, RS, RB } },
4247 { "nand.", XRC(31,476,1), X_MASK, COM, { RA, RS, RB } },
4283 { "stdcxe.", XRC(31,511,1), X_MASK, BOOKE64, { RS, RA, RB } },
4302 { "srw", XRC(31,536,0), X_MASK, PPCCOM, { RA, RS, RB } },
4303 { "sr", XRC(31,536,0), X_MASK, PWRCOM, { RA, RS, RB } },
4304 { "srw.", XRC(31,536,1), X_MASK, PPCCOM, { RA, RS, RB } },
4305 { "sr.", XRC(31,536,1), X_MASK, PWRCOM, { RA, RS, RB } },
4307 { "rrib", XRC(31,537,0), X_MASK, M601, { RA, RS, RB } },
4308 { "rrib.", XRC(31,537,1), X_MASK, M601, { RA, RS, RB } },
4310 { "srd", XRC(31,539,0), X_MASK, PPC64, { RA, RS, RB } },
4311 { "srd.", XRC(31,539,1), X_MASK, PPC64, { RA, RS, RB } },
4313 { "maskir", XRC(31,541,0), X_MASK, M601, { RA, RS, RB } },
4314 { "maskir.", XRC(31,541,1), X_MASK, M601, { RA, RS, RB } },
4343 { "mffgpr", XRC(31,607,0), XRA_MASK, POWER6, { FRT, RB } },
4365 { "srq", XRC(31,664,0), X_MASK, M601, { RA, RS, RB } },
4366 { "srq.", XRC(31,664,1), X_MASK, M601, { RA, RS, RB } },
4368 { "sre", XRC(31,665,0), X_MASK, M601, { RA, RS, RB } },
4369 { "sre.", XRC(31,665,1), X_MASK, M601, { RA, RS, RB } },
4377 { "sriq", XRC(31,696,0), X_MASK, M601, { RA, RS, SH } },
4378 { "sriq.", XRC(31,696,1), X_MASK, M601, { RA, RS, SH } },
4387 { "srlq", XRC(31,728,0), X_MASK, M601, { RA, RS, RB } },
4388 { "srlq.", XRC(31,728,1), X_MASK, M601, { RA, RS, RB } },
4390 { "sreq", XRC(31,729,0), X_MASK, M601, { RA, RS, RB } },
4391 { "sreq.", XRC(31,729,1), X_MASK, M601, { RA, RS, RB } },
4395 { "mftgpr", XRC(31,735,0), XRA_MASK, POWER6, { RT, FRB } },
4401 { "srliq", XRC(31,760,0), X_MASK, M601, { RA, RS, SH } },
4402 { "srliq.", XRC(31,760,1), X_MASK, M601, { RA, RS, SH } },
4415 { "sraw", XRC(31,792,0), X_MASK, PPCCOM, { RA, RS, RB } },
4416 { "sra", XRC(31,792,0), X_MASK, PWRCOM, { RA, RS, RB } },
4417 { "sraw.", XRC(31,792,1), X_MASK, PPCCOM, { RA, RS, RB } },
4418 { "sra.", XRC(31,792,1), X_MASK, PWRCOM, { RA, RS, RB } },
4420 { "srad", XRC(31,794,0), X_MASK, PPC64, { RA, RS, RB } },
4421 { "srad.", XRC(31,794,1), X_MASK, PPC64, { RA, RS, RB } },
4435 { "srawi", XRC(31,824,0), X_MASK, PPCCOM, { RA, RS, SH } },
4436 { "srai", XRC(31,824,0), X_MASK, PWRCOM, { RA, RS, SH } },
4437 { "srawi.", XRC(31,824,1), X_MASK, PPCCOM, { RA, RS, SH } },
4438 { "srai.", XRC(31,824,1), X_MASK, PWRCOM, { RA, RS, SH } },
4451 { "tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
4452 { "tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
4453 { "tlbsxe", XRC(31,915,0), X_MASK, BOOKE64, { RA, RB } },
4454 { "tlbsxe.", XRC(31,915,1), X_MASK, BOOKE64, { RA, RB } },
4462 { "sraq", XRC(31,920,0), X_MASK, M601, { RA, RS, RB } },
4463 { "sraq.", XRC(31,920,1), X_MASK, M601, { RA, RS, RB } },
4465 { "srea", XRC(31,921,0), X_MASK, M601, { RA, RS, RB } },
4466 { "srea.", XRC(31,921,1), X_MASK, M601, { RA, RS, RB } },
4468 { "extsh", XRC(31,922,0), XRB_MASK, PPCCOM, { RA, RS } },
4469 { "exts", XRC(31,922,0), XRB_MASK, PWRCOM, { RA, RS } },
4470 { "extsh.", XRC(31,922,1), XRB_MASK, PPCCOM, { RA, RS } },
4471 { "exts.", XRC(31,922,1), XRB_MASK, PWRCOM, { RA, RS } },
4483 { "sraiq", XRC(31,952,0), X_MASK, M601, { RA, RS, SH } },
4484 { "sraiq.", XRC(31,952,1), X_MASK, M601, { RA, RS, SH } },
4486 { "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
4487 { "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
4504 { "extsw", XRC(31,986,0), XRB_MASK, PPC64 | BOOKE64,{ RA, RS } },
4505 { "extsw.", XRC(31,986,1), XRB_MASK, PPC64, { RA, RS } },
4628 { "dadd", XRC(59,2,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4629 { "dadd.", XRC(59,2,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4667 { "dmul", XRC(59,34,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4668 { "dmul.", XRC(59,34,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4694 { "dctdp", XRC(59,258,0), X_MASK, POWER6, { FRT, FRB } },
4695 { "dctdp.", XRC(59,258,1), X_MASK, POWER6, { FRT, FRB } },
4697 { "dctfix", XRC(59,290,0), X_MASK, POWER6, { FRT, FRB } },
4698 { "dctfix.", XRC(59,290,1), X_MASK, POWER6, { FRT, FRB } },
4700 { "ddedpd", XRC(59,322,0), X_MASK, POWER6, { SP, FRT, FRB } },
4701 { "ddedpd.", XRC(59,322,1), X_MASK, POWER6, { SP, FRT, FRB } },
4703 { "dxex", XRC(59,354,0), X_MASK, POWER6, { FRT, FRB } },
4704 { "dxex.", XRC(59,354,1), X_MASK, POWER6, { FRT, FRB } },
4706 { "dsub", XRC(59,514,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4707 { "dsub.", XRC(59,514,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4709 { "ddiv", XRC(59,546,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4710 { "ddiv.", XRC(59,546,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4716 { "drsp", XRC(59,770,0), X_MASK, POWER6, { FRT, FRB } },
4717 { "drsp.", XRC(59,770,1), X_MASK, POWER6, { FRT, FRB } },
4719 { "dcffix", XRC(59,802,0), X_MASK, POWER6, { FRT, FRB } },
4720 { "dcffix.", XRC(59,802,1), X_MASK, POWER6, { FRT, FRB } },
4722 { "denbcd", XRC(59,834,0), X_MASK, POWER6, { S, FRT, FRB } },
4723 { "denbcd.", XRC(59,834,1), X_MASK, POWER6, { S, FRT, FRB } },
4725 { "diex", XRC(59,866,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4726 { "diex.", XRC(59,866,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4755 { "daddq", XRC(63,2,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4756 { "daddq.", XRC(63,2,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4761 { "fcpsgn", XRC(63,8,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4762 { "fcpsgn.", XRC(63,8,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4764 { "frsp", XRC(63,12,0), XRA_MASK, COM, { FRT, FRB } },
4765 { "frsp.", XRC(63,12,1), XRA_MASK, COM, { FRT, FRB } },
4767 { "fctiw", XRC(63,14,0), XRA_MASK, PPCCOM, { FRT, FRB } },
4768 { "fcir", XRC(63,14,0), XRA_MASK, POWER2, { FRT, FRB } },
4769 { "fctiw.", XRC(63,14,1), XRA_MASK, PPCCOM, { FRT, FRB } },
4770 { "fcir.", XRC(63,14,1), XRA_MASK, POWER2, { FRT, FRB } },
4772 { "fctiwz", XRC(63,15,0), XRA_MASK, PPCCOM, { FRT, FRB } },
4773 { "fcirz", XRC(63,15,0), XRA_MASK, POWER2, { FRT, FRB } },
4774 { "fctiwz.", XRC(63,15,1), XRA_MASK, PPCCOM, { FRT, FRB } },
4775 { "fcirz.", XRC(63,15,1), XRA_MASK, POWER2, { FRT, FRB } },
4831 { "dmulq", XRC(63,34,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4832 { "dmulq.", XRC(63,34,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4837 { "mtfsb1", XRC(63,38,0), XRARB_MASK, COM, { BT } },
4838 { "mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, { BT } },
4840 { "fneg", XRC(63,40,0), XRA_MASK, COM, { FRT, FRB } },
4841 { "fneg.", XRC(63,40,1), XRA_MASK, COM, { FRT, FRB } },
4851 { "mtfsb0", XRC(63,70,0), XRARB_MASK, COM, { BT } },
4852 { "mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, { BT } },
4854 { "fmr", XRC(63,72,0), XRA_MASK, COM, { FRT, FRB } },
4855 { "fmr.", XRC(63,72,1), XRA_MASK, COM, { FRT, FRB } },
4865 { "mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, { BF, U } },
4866 { "mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, { BF, U } },
4868 { "fnabs", XRC(63,136,0), XRA_MASK, COM, { FRT, FRB } },
4869 { "fnabs.", XRC(63,136,1), XRA_MASK, COM, { FRT, FRB } },
4878 { "dctqpq", XRC(63,258,0), X_MASK, POWER6, { FRT, FRB } },
4879 { "dctqpq.", XRC(63,258,1), X_MASK, POWER6, { FRT, FRB } },
4881 { "fabs", XRC(63,264,0), XRA_MASK, COM, { FRT, FRB } },
4882 { "fabs.", XRC(63,264,1), XRA_MASK, COM, { FRT, FRB } },
4884 { "dctfixq", XRC(63,290,0), X_MASK, POWER6, { FRT, FRB } },
4885 { "dctfixq.",XRC(63,290,1), X_MASK, POWER6, { FRT, FRB } },
4887 { "ddedpdq", XRC(63,322,0), X_MASK, POWER6, { SP, FRT, FRB } },
4888 { "ddedpdq.",XRC(63,322,1), X_MASK, POWER6, { SP, FRT, FRB } },
4890 { "dxexq", XRC(63,354,0), X_MASK, POWER6, { FRT, FRB } },
4891 { "dxexq.", XRC(63,354,1), X_MASK, POWER6, { FRT, FRB } },
4893 { "frin", XRC(63,392,0), XRA_MASK, POWER5, { FRT, FRB } },
4894 { "frin.", XRC(63,392,1), XRA_MASK, POWER5, { FRT, FRB } },
4895 { "friz", XRC(63,424,0), XRA_MASK, POWER5, { FRT, FRB } },
4896 { "friz.", XRC(63,424,1), XRA_MASK, POWER5, { FRT, FRB } },
4897 { "frip", XRC(63,456,0), XRA_MASK, POWER5, { FRT, FRB } },
4898 { "frip.", XRC(63,456,1), XRA_MASK, POWER5, { FRT, FRB } },
4899 { "frim", XRC(63,488,0), XRA_MASK, POWER5, { FRT, FRB } },
4900 { "frim.", XRC(63,488,1), XRA_MASK, POWER5, { FRT, FRB } },
4902 { "dsubq", XRC(63,514,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4903 { "dsubq.", XRC(63,514,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4905 { "ddivq", XRC(63,546,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4906 { "ddivq.", XRC(63,546,1), X_MASK, POWER6, { FRT, FRA, FRB } },
4908 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
4909 { "mffs.", XRC(63,583,1), XRARB_MASK, COM, { FRT } },
4918 { "drdpq", XRC(63,770,0), X_MASK, POWER6, { FRT, FRB } },
4919 { "drdpq.", XRC(63,770,1), X_MASK, POWER6, { FRT, FRB } },
4921 { "dcffixq", XRC(63,802,0), X_MASK, POWER6, { FRT, FRB } },
4922 { "dcffixq.",XRC(63,802,1), X_MASK, POWER6, { FRT, FRB } },
4924 { "fctid", XRC(63,814,0), XRA_MASK, PPC64, { FRT, FRB } },
4925 { "fctid.", XRC(63,814,1), XRA_MASK, PPC64, { FRT, FRB } },
4927 { "fctidz", XRC(63,815,0), XRA_MASK, PPC64, { FRT, FRB } },
4928 { "fctidz.", XRC(63,815,1), XRA_MASK, PPC64, { FRT, FRB } },
4930 { "denbcdq", XRC(63,834,0), X_MASK, POWER6, { S, FRT, FRB } },
4931 { "denbcdq.",XRC(63,834,1), X_MASK, POWER6, { S, FRT, FRB } },
4933 { "fcfid", XRC(63,846,0), XRA_MASK, PPC64, { FRT, FRB } },
4934 { "fcfid.", XRC(63,846,1), XRA_MASK, PPC64, { FRT, FRB } },
4936 { "diexq", XRC(63,866,0), X_MASK, POWER6, { FRT, FRA, FRB } },
4937 { "diexq.", XRC(63,866,1), X_MASK, POWER6, { FRT, FRA, FRB } },