Lines Matching refs:OP_MASK
1526 #define OP_MASK OP (0x3f)
1532 #define OPTO_MASK (OP_MASK | TO_MASK)
1597 #define DRA_MASK (OP_MASK | RA_MASK)
1643 #define SC_MASK (OP_MASK | (((unsigned long)0x3ff) << 16) | (((unsigned long)1) << 1) | 1)
1954 { "tdi", OP(2), OP_MASK, PPC64, { TO, RA, SI } },
1984 { "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } },
1985 { "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } },
2512 { "mulli", OP(7), OP_MASK, PPCCOM, { RT, RA, SI } },
2513 { "muli", OP(7), OP_MASK, PWRCOM, { RT, RA, SI } },
2515 { "subfic", OP(8), OP_MASK, PPCCOM, { RT, RA, SI } },
2516 { "sfi", OP(8), OP_MASK, PWRCOM, { RT, RA, SI } },
2518 { "dozi", OP(9), OP_MASK, M601, { RT, RA, SI } },
2527 { "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } },
2528 { "cmpli", OP(10), OP_MASK, PWRCOM, { BF, RA, UI } },
2532 { "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } },
2533 { "cmpi", OP(11), OP_MASK, PWRCOM, { BF, RA, SI } },
2535 { "addic", OP(12), OP_MASK, PPCCOM, { RT, RA, SI } },
2536 { "ai", OP(12), OP_MASK, PWRCOM, { RT, RA, SI } },
2537 { "subic", OP(12), OP_MASK, PPCCOM, { RT, RA, NSI } },
2539 { "addic.", OP(13), OP_MASK, PPCCOM, { RT, RA, SI } },
2540 { "ai.", OP(13), OP_MASK, PWRCOM, { RT, RA, SI } },
2541 { "subic.", OP(13), OP_MASK, PPCCOM, { RT, RA, NSI } },
2545 { "addi", OP(14), OP_MASK, PPCCOM, { RT, RA0, SI } },
2546 { "cal", OP(14), OP_MASK, PWRCOM, { RT, D, RA0 } },
2547 { "subi", OP(14), OP_MASK, PPCCOM, { RT, RA0, NSI } },
2548 { "la", OP(14), OP_MASK, PPCCOM, { RT, D, RA0 } },
2552 { "addis", OP(15), OP_MASK, PPCCOM, { RT,RA0,SISIGNOPT } },
2553 { "cau", OP(15), OP_MASK, PWRCOM, { RT,RA0,SISIGNOPT } },
2554 { "subis", OP(15), OP_MASK, PPCCOM, { RT, RA0, NSI } },
3281 { "ori", OP(24), OP_MASK, PPCCOM, { RA, RS, UI } },
3282 { "oril", OP(24), OP_MASK, PWRCOM, { RA, RS, UI } },
3284 { "oris", OP(25), OP_MASK, PPCCOM, { RA, RS, UI } },
3285 { "oriu", OP(25), OP_MASK, PWRCOM, { RA, RS, UI } },
3287 { "xori", OP(26), OP_MASK, PPCCOM, { RA, RS, UI } },
3288 { "xoril", OP(26), OP_MASK, PWRCOM, { RA, RS, UI } },
3290 { "xoris", OP(27), OP_MASK, PPCCOM, { RA, RS, UI } },
3291 { "xoriu", OP(27), OP_MASK, PWRCOM, { RA, RS, UI } },
3293 { "andi.", OP(28), OP_MASK, PPCCOM, { RA, RS, UI } },
3294 { "andil.", OP(28), OP_MASK, PWRCOM, { RA, RS, UI } },
3296 { "andis.", OP(29), OP_MASK, PPCCOM, { RA, RS, UI } },
3297 { "andiu.", OP(29), OP_MASK, PWRCOM, { RA, RS, UI } },
4545 { "lwz", OP(32), OP_MASK, PPCCOM, { RT, D, RA0 } },
4546 { "l", OP(32), OP_MASK, PWRCOM, { RT, D, RA0 } },
4548 { "lwzu", OP(33), OP_MASK, PPCCOM, { RT, D, RAL } },
4549 { "lu", OP(33), OP_MASK, PWRCOM, { RT, D, RA0 } },
4551 { "lbz", OP(34), OP_MASK, COM, { RT, D, RA0 } },
4553 { "lbzu", OP(35), OP_MASK, COM, { RT, D, RAL } },
4555 { "stw", OP(36), OP_MASK, PPCCOM, { RS, D, RA0 } },
4556 { "st", OP(36), OP_MASK, PWRCOM, { RS, D, RA0 } },
4558 { "stwu", OP(37), OP_MASK, PPCCOM, { RS, D, RAS } },
4559 { "stu", OP(37), OP_MASK, PWRCOM, { RS, D, RA0 } },
4561 { "stb", OP(38), OP_MASK, COM, { RS, D, RA0 } },
4563 { "stbu", OP(39), OP_MASK, COM, { RS, D, RAS } },
4565 { "lhz", OP(40), OP_MASK, COM, { RT, D, RA0 } },
4567 { "lhzu", OP(41), OP_MASK, COM, { RT, D, RAL } },
4569 { "lha", OP(42), OP_MASK, COM, { RT, D, RA0 } },
4571 { "lhau", OP(43), OP_MASK, COM, { RT, D, RAL } },
4573 { "sth", OP(44), OP_MASK, COM, { RS, D, RA0 } },
4575 { "sthu", OP(45), OP_MASK, COM, { RS, D, RAS } },
4577 { "lmw", OP(46), OP_MASK, PPCCOM, { RT, D, RAM } },
4578 { "lm", OP(46), OP_MASK, PWRCOM, { RT, D, RA0 } },
4580 { "stmw", OP(47), OP_MASK, PPCCOM, { RS, D, RA0 } },
4581 { "stm", OP(47), OP_MASK, PWRCOM, { RS, D, RA0 } },
4583 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4585 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4587 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4589 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4591 { "stfs", OP(52), OP_MASK, COM, { FRS, D, RA0 } },
4593 { "stfsu", OP(53), OP_MASK, COM, { FRS, D, RAS } },
4595 { "stfd", OP(54), OP_MASK, COM, { FRS, D, RA0 } },
4597 { "stfdu", OP(55), OP_MASK, COM, { FRS, D, RAS } },
4599 { "lq", OP(56), OP_MASK, POWER4, { RTQ, DQ, RAQ } },
4601 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4603 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4605 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4728 { "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } },
4730 { "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } },
4732 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },