Lines Matching refs:hose
59 struct pci_controller *hose;
65 hose = pci_bus_to_host(dev->bus);
66 if (hose == NULL)
69 if (!of_device_is_compatible(hose->dn, "ibm,plb-pciex") &&
70 !of_device_is_compatible(hose->dn, "ibm,plb-pcix") &&
71 !of_device_is_compatible(hose->dn, "ibm,plb-pci"))
74 if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") ||
75 of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) {
76 hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM;
92 static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
99 int pna = of_n_addr_cells(hose->dn);
109 ranges = of_get_property(hose->dn, "dma-ranges", &rlen);
117 u64 cpu_addr = of_translate_dma_address(hose->dn, ranges + 3);
133 hose->dn->full_name,
157 hose->dn->full_name);
167 hose->dn->full_name, size, (u64)total_memory);
175 hose->dn->full_name);
182 hose->dn->full_name);
198 static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller *hose,
228 hose->dn->full_name);
246 static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
253 struct resource *res = &hose->mem_resources[i];
260 hose->dn->full_name);
265 if (ppc4xx_setup_one_pci_PMM(hose, reg,
267 res->start - hose->pci_mem_offset,
276 if (res->start == hose->pci_mem_offset)
282 if (j <= 2 && !found_isa_hole && hose->isa_mem_size)
283 if (ppc4xx_setup_one_pci_PMM(hose, reg, hose->isa_mem_phys, 0,
284 hose->isa_mem_size, 0, j) == 0)
286 hose->dn->full_name);
289 static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
305 early_write_config_dword(hose, hose->first_busno, 0,
307 early_write_config_dword(hose, hose->first_busno, 0,
309 early_write_config_word(hose, hose->first_busno, 0,
319 struct pci_controller *hose = NULL;
359 hose = pcibios_alloc_controller(np);
360 if (!hose)
363 hose->first_busno = bus_range ? bus_range[0] : 0x0;
364 hose->last_busno = bus_range ? bus_range[1] : 0xff;
367 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0);
377 pci_process_bridge_OF_ranges(hose, np, primary);
380 if (ppc4xx_parse_dma_ranges(hose, reg, &dma_window) != 0)
384 ppc4xx_configure_pci_PMMs(hose, reg);
387 ppc4xx_configure_pci_PTMs(hose, reg, &dma_window);
394 if (hose)
395 pcibios_free_controller(hose);
404 static int __init ppc4xx_setup_one_pcix_POM(struct pci_controller *hose,
417 hose->dn->full_name);
446 static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
453 struct resource *res = &hose->mem_resources[i];
460 hose->dn->full_name);
465 if (ppc4xx_setup_one_pcix_POM(hose, reg,
467 res->start - hose->pci_mem_offset,
476 if (res->start == hose->pci_mem_offset)
482 if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
483 if (ppc4xx_setup_one_pcix_POM(hose, reg, hose->isa_mem_phys, 0,
484 hose->isa_mem_size, 0, j) == 0)
486 hose->dn->full_name);
489 static void __init ppc4xx_configure_pcix_PIMs(struct pci_controller *hose,
524 struct pci_controller *hose = NULL;
565 hose = pcibios_alloc_controller(np);
566 if (!hose)
569 hose->first_busno = bus_range ? bus_range[0] : 0x0;
570 hose->last_busno = bus_range ? bus_range[1] : 0xff;
573 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
589 pci_process_bridge_OF_ranges(hose, np, primary);
592 if (ppc4xx_parse_dma_ranges(hose, reg, &dma_window) != 0)
596 ppc4xx_configure_pcix_POMs(hose, reg);
599 ppc4xx_configure_pcix_PIMs(hose, reg, &dma_window, big_pim, msi);
606 if (hose)
607 pcibios_free_controller(hose);
632 struct pci_controller *hose;
1365 if (port->endpoint && bus->number != port->hose->first_busno)
1369 if (bus->number > port->hose->last_busno) {
1379 if (bus->number == port->hose->first_busno && devfn != 0)
1383 if (bus->number == (port->hose->first_busno + 1) &&
1388 if ((bus->number != port->hose->first_busno) && !port->link)
1403 if (bus->number == port->hose->first_busno)
1404 return (void __iomem *)port->hose->cfg_addr;
1406 relbus = bus->number - (port->hose->first_busno + 1);
1407 return (void __iomem *)port->hose->cfg_data +
1414 struct pci_controller *hose = pci_bus_to_host(bus);
1416 &ppc4xx_pciex_ports[hose->indirect_type];
1420 BUG_ON(hose != port->hose);
1452 bus->number, hose->first_busno, hose->last_busno,
1471 struct pci_controller *hose = pci_bus_to_host(bus);
1473 &ppc4xx_pciex_ports[hose->indirect_type];
1492 bus->number, hose->first_busno, hose->last_busno,
1519 struct pci_controller *hose,
1534 hose->dn->full_name);
1580 struct pci_controller *hose,
1587 struct resource *res = &hose->mem_resources[i];
1599 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1601 res->start - hose->pci_mem_offset,
1610 if (res->start == hose->pci_mem_offset)
1616 if (j <= 1 && !found_isa_hole && hose->isa_mem_size)
1617 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1618 hose->isa_mem_phys, 0,
1619 hose->isa_mem_size, 0, j) == 0)
1621 hose->dn->full_name);
1626 if (hose->io_resource.flags & IORESOURCE_IO)
1627 ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1628 hose->io_base_phys, 0,
1633 struct pci_controller *hose,
1702 struct pci_controller *hose = NULL;
1717 hose = pcibios_alloc_controller(port->node);
1718 if (!hose)
1724 hose->indirect_type = port->index;
1727 hose->first_busno = bus_range ? bus_range[0] : 0x0;
1728 hose->last_busno = bus_range ? bus_range[1] : 0xff;
1735 busses = hose->last_busno - hose->first_busno; /* This is off by 1 */
1738 hose->last_busno = hose->first_busno + busses;
1746 (hose->first_busno + 1) * 0x100000,
1753 hose->cfg_data = cfg_data;
1765 hose->cfg_addr = mbase;
1768 hose->first_busno, hose->last_busno);
1770 hose->cfg_addr, hose->cfg_data);
1773 hose->ops = &ppc4xx_pciex_pci_ops;
1774 port->hose = hose;
1775 mbase = (void __iomem *)hose->cfg_addr;
1781 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1782 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1783 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1792 pci_process_bridge_OF_ranges(hose, port->node, primary);
1795 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0)
1799 ppc4xx_configure_pciex_POMs(port, hose, mbase);
1802 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
1850 if (hose)
1851 pcibios_free_controller(hose);
1948 /* Setup the linux hose data structure */