Lines Matching refs:__be32
27 __be32 potar; /* 0x.0 - Outbound translation address register */
28 __be32 potear; /* 0x.4 - Outbound translation extended address register */
29 __be32 powbar; /* 0x.8 - Outbound window base address register */
31 __be32 powar; /* 0x.10 - Outbound window attributes register */
37 __be32 pitar; /* 0x.0 - Inbound translation address register */
39 __be32 piwbar; /* 0x.8 - Inbound window base address register */
40 __be32 piwbear; /* 0x.c - Inbound window base extended address register */
41 __be32 piwar; /* 0x.10 - Inbound window attributes register */
47 __be32 config_addr; /* 0x.000 - PCI/PCIE Configuration Address Register */
48 __be32 config_data; /* 0x.004 - PCI/PCIE Configuration Data Register */
49 __be32 int_ack; /* 0x.008 - PCI Interrupt Acknowledge Register */
50 __be32 pex_otb_cpl_tor; /* 0x.00c - PCIE Outbound completion timeout register */
51 __be32 pex_conf_tor; /* 0x.010 - PCIE configuration timeout register */
53 __be32 pex_pme_mes_dr; /* 0x.020 - PCIE PME and message detect register */
54 __be32 pex_pme_mes_disr; /* 0x.024 - PCIE PME and message disable register */
55 __be32 pex_pme_mes_ier; /* 0x.028 - PCIE PME and message interrupt enable register */
56 __be32 pex_pmcr; /* 0x.02c - PCIE power management command register */
74 __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */
76 __be32 pex_err_en; /* 0x.e08 - PCI/PCIE error interrupt enable register */
78 __be32 pex_err_disr; /* 0x.e10 - PCI/PCIE error disable register */
80 __be32 pex_err_cap_stat; /* 0x.e20 - PCI/PCIE error capture status register */
82 __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
83 __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 0 */
84 __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 0 */
85 __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */