Lines Matching refs:fcr
167 unsigned long fcr;
193 fcr = MACIO_IN32(OHARE_FCR);
195 if (!(fcr & OH_SCC_ENABLE)) {
196 fcr |= OH_SCC_ENABLE;
204 fcr &= ~HRW_SCC_TRANS_EN_N;
205 MACIO_OUT32(OHARE_FCR, fcr);
206 fcr |= (rmask = HRW_RESET_SCC);
207 MACIO_OUT32(OHARE_FCR, fcr);
209 fcr |= (rmask = OH_SCC_RESET);
210 MACIO_OUT32(OHARE_FCR, fcr);
216 fcr &= ~rmask;
217 MACIO_OUT32(OHARE_FCR, fcr);
220 fcr |= OH_SCCA_IO;
222 fcr |= OH_SCCB_IO;
223 MACIO_OUT32(OHARE_FCR, fcr);
232 fcr = MACIO_IN32(OHARE_FCR);
234 fcr &= ~OH_SCCA_IO;
236 fcr &= ~OH_SCCB_IO;
237 MACIO_OUT32(OHARE_FCR, fcr);
238 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
239 fcr &= ~OH_SCC_ENABLE;
241 fcr |= HRW_SCC_TRANS_EN_N;
242 MACIO_OUT32(OHARE_FCR, fcr);
607 u32 fcr;
624 fcr = MACIO_IN32(KEYLARGO_FCR0);
626 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
627 fcr |= KL0_SCC_CELL_ENABLE;
631 fcr |= KL0_SCCA_ENABLE;
634 fcr &= ~KL0_SCC_A_INTF_ENABLE;
636 fcr |= KL0_SCC_A_INTF_ENABLE;
639 fcr |= KL0_SCCB_ENABLE;
642 fcr &= ~KL0_SCC_B_INTF_ENABLE;
643 fcr |= KL0_IRDA_ENABLE;
644 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
645 fcr |= KL0_IRDA_SOURCE1_SEL;
646 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
647 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
650 fcr |= KL0_SCC_B_INTF_ENABLE;
652 MACIO_OUT32(KEYLARGO_FCR0, fcr);
677 fcr = MACIO_IN32(KEYLARGO_FCR0);
679 fcr &= ~KL0_SCCA_ENABLE;
681 fcr &= ~KL0_SCCB_ENABLE;
684 fcr &= ~KL0_IRDA_ENABLE;
685 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
686 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
687 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
690 MACIO_OUT32(KEYLARGO_FCR0, fcr);
691 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
692 fcr &= ~KL0_SCC_CELL_ENABLE;
693 MACIO_OUT32(KEYLARGO_FCR0, fcr);