Lines Matching defs:csa
88 static inline int check_spu_isolate(struct spu_state *csa, struct spu *spu)
104 static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
118 if (csa) {
119 csa->priv1.int_mask_class0_RW = spu_int_mask_get(spu, 0);
120 csa->priv1.int_mask_class1_RW = spu_int_mask_get(spu, 1);
121 csa->priv1.int_mask_class2_RW = spu_int_mask_get(spu, 2);
141 static inline void set_watchdog_timer(struct spu_state *csa, struct spu *spu)
154 static inline void inhibit_user_access(struct spu_state *csa, struct spu *spu)
165 static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
174 static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
189 if (csa)
190 csa->priv2.mfc_control_RW =
199 if (csa)
200 csa->priv2.mfc_control_RW =
208 static inline void save_spu_runcntl(struct spu_state *csa, struct spu *spu)
216 csa->prob.spu_runcntl_RW = in_be32(&prob->spu_runcntl_RW);
219 static inline void save_mfc_sr1(struct spu_state *csa, struct spu *spu)
224 csa->priv1.mfc_sr1_RW = spu_mfc_sr1_get(spu);
227 static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
235 csa->prob.spu_status_R = in_be32(&prob->spu_status_R);
247 csa->prob.spu_status_R = SPU_STATUS_RUNNING;
249 csa->prob.spu_status_R = in_be32(&prob->spu_status_R);
253 static inline void save_mfc_stopped_status(struct spu_state *csa,
266 csa->priv2.mfc_control_RW &= ~mask;
267 csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
270 static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
283 static inline void save_timebase(struct spu_state *csa, struct spu *spu)
289 csa->suspend_time = get_cycles();
292 static inline void remove_other_spu_access(struct spu_state *csa,
301 static inline void do_mfc_mssync(struct spu_state *csa, struct spu *spu)
314 static inline void issue_mfc_tlbie(struct spu_state *csa, struct spu *spu)
326 static inline void handle_pending_interrupts(struct spu_state *csa,
340 static inline void save_mfc_queues(struct spu_state *csa, struct spu *spu)
351 csa->priv2.puq[i].mfc_cq_data0_RW =
353 csa->priv2.puq[i].mfc_cq_data1_RW =
355 csa->priv2.puq[i].mfc_cq_data2_RW =
357 csa->priv2.puq[i].mfc_cq_data3_RW =
361 csa->priv2.spuq[i].mfc_cq_data0_RW =
363 csa->priv2.spuq[i].mfc_cq_data1_RW =
365 csa->priv2.spuq[i].mfc_cq_data2_RW =
367 csa->priv2.spuq[i].mfc_cq_data3_RW =
373 static inline void save_ppu_querymask(struct spu_state *csa, struct spu *spu)
381 csa->prob.dma_querymask_RW = in_be32(&prob->dma_querymask_RW);
384 static inline void save_ppu_querytype(struct spu_state *csa, struct spu *spu)
392 csa->prob.dma_querytype_RW = in_be32(&prob->dma_querytype_RW);
395 static inline void save_ppu_tagstatus(struct spu_state *csa, struct spu *spu)
405 csa->prob.dma_tagstatus_R = in_be32(&prob->dma_tagstatus_R);
408 static inline void save_mfc_csr_tsq(struct spu_state *csa, struct spu *spu)
416 csa->priv2.spu_tag_status_query_RW =
420 static inline void save_mfc_csr_cmd(struct spu_state *csa, struct spu *spu)
428 csa->priv2.spu_cmd_buf1_RW = in_be64(&priv2->spu_cmd_buf1_RW);
429 csa->priv2.spu_cmd_buf2_RW = in_be64(&priv2->spu_cmd_buf2_RW);
432 static inline void save_mfc_csr_ato(struct spu_state *csa, struct spu *spu)
440 csa->priv2.spu_atomic_status_RW = in_be64(&priv2->spu_atomic_status_RW);
443 static inline void save_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
449 csa->priv1.mfc_tclass_id_RW = spu_mfc_tclass_id_get(spu);
452 static inline void set_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
463 static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
477 static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu)
490 static inline void setup_mfc_sr1(struct spu_state *csa, struct spu *spu)
508 static inline void save_spu_npc(struct spu_state *csa, struct spu *spu)
515 csa->prob.spu_npc_RW = in_be32(&prob->spu_npc_RW);
518 static inline void save_spu_privcntl(struct spu_state *csa, struct spu *spu)
525 csa->priv2.spu_privcntl_RW = in_be64(&priv2->spu_privcntl_RW);
528 static inline void reset_spu_privcntl(struct spu_state *csa, struct spu *spu)
540 static inline void save_spu_lslr(struct spu_state *csa, struct spu *spu)
547 csa->priv2.spu_lslr_RW = in_be64(&priv2->spu_lslr_RW);
550 static inline void reset_spu_lslr(struct spu_state *csa, struct spu *spu)
562 static inline void save_spu_cfg(struct spu_state *csa, struct spu *spu)
569 csa->priv2.spu_cfg_RW = in_be64(&priv2->spu_cfg_RW);
572 static inline void save_pm_trace(struct spu_state *csa, struct spu *spu)
580 static inline void save_mfc_rag(struct spu_state *csa, struct spu *spu)
586 csa->priv1.resource_allocation_groupID_RW =
588 csa->priv1.resource_allocation_enable_RW =
592 static inline void save_ppu_mb_stat(struct spu_state *csa, struct spu *spu)
599 csa->prob.mb_stat_R = in_be32(&prob->mb_stat_R);
602 static inline void save_ppu_mb(struct spu_state *csa, struct spu *spu)
609 csa->prob.pu_mb_R = in_be32(&prob->pu_mb_R);
612 static inline void save_ppuint_mb(struct spu_state *csa, struct spu *spu)
619 csa->priv2.puint_mb_R = in_be64(&priv2->puint_mb_R);
622 static inline void save_ch_part1(struct spu_state *csa, struct spu *spu)
633 csa->spu_chnldata_RW[1] = in_be64(&priv2->spu_chnldata_RW);
640 csa->spu_chnldata_RW[idx] = in_be64(&priv2->spu_chnldata_RW);
641 csa->spu_chnlcnt_RW[idx] = in_be64(&priv2->spu_chnlcnt_RW);
648 static inline void save_spu_mb(struct spu_state *csa, struct spu *spu)
658 csa->spu_chnlcnt_RW[29] = in_be64(&priv2->spu_chnlcnt_RW);
660 csa->spu_mailbox_data[i] = in_be64(&priv2->spu_chnldata_RW);
666 static inline void save_mfc_cmd(struct spu_state *csa, struct spu *spu)
675 csa->spu_chnlcnt_RW[21] = in_be64(&priv2->spu_chnlcnt_RW);
679 static inline void reset_ch(struct spu_state *csa, struct spu *spu)
699 static inline void resume_mfc_queue(struct spu_state *csa, struct spu *spu)
710 static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu,
728 spu_setup_kernel_slbs(spu, csa->lscsa, code, code_size);
731 static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
739 * Now that we have saved the mfc in the csa, we can add in the
743 csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
748 static inline void enable_interrupts(struct spu_state *csa, struct spu *spu)
805 static inline void save_ls_16kb(struct spu_state *csa, struct spu *spu)
807 unsigned long addr = (unsigned long)&csa->lscsa->ls[0];
821 static inline void set_spu_npc(struct spu_state *csa, struct spu *spu)
838 static inline void set_signot1(struct spu_state *csa, struct spu *spu)
851 addr64.ull = (u64) csa->lscsa;
856 static inline void set_signot2(struct spu_state *csa, struct spu *spu)
869 addr64.ull = (u64) csa->lscsa;
874 static inline void send_save_code(struct spu_state *csa, struct spu *spu)
890 static inline void set_ppu_querymask(struct spu_state *csa, struct spu *spu)
903 static inline void wait_tag_complete(struct spu_state *csa, struct spu *spu)
926 static inline void wait_spu_stopped(struct spu_state *csa, struct spu *spu)
945 static inline int check_save_status(struct spu_state *csa, struct spu *spu)
960 static inline void terminate_spu_app(struct spu_state *csa, struct spu *spu)
968 static inline void suspend_mfc_and_halt_decr(struct spu_state *csa,
982 static inline void wait_suspend_mfc_complete(struct spu_state *csa,
996 static inline int suspend_spe(struct spu_state *csa, struct spu *spu)
1038 static inline void clear_spu_status(struct spu_state *csa, struct spu *spu)
1072 static inline void reset_ch_part1(struct spu_state *csa, struct spu *spu)
1097 static inline void reset_ch_part2(struct spu_state *csa, struct spu *spu)
1117 static inline void setup_spu_status_part1(struct spu_state *csa,
1143 (csa->prob.spu_status_R >> SPU_STOP_STATUS_SHIFT) & 0xFFFF;
1144 if ((csa->prob.spu_status_R & status_P_I) == status_P_I) {
1150 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_P_I;
1151 csa->lscsa->stopped_status.slot[1] = status_code;
1153 } else if ((csa->prob.spu_status_R & status_P_H) == status_P_H) {
1159 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_P_H;
1160 csa->lscsa->stopped_status.slot[1] = status_code;
1162 } else if ((csa->prob.spu_status_R & status_S_P) == status_S_P) {
1167 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_S_P;
1168 csa->lscsa->stopped_status.slot[1] = status_code;
1170 } else if ((csa->prob.spu_status_R & status_S_I) == status_S_I) {
1175 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_S_I;
1176 csa->lscsa->stopped_status.slot[1] = status_code;
1178 } else if ((csa->prob.spu_status_R & status_P) == status_P) {
1183 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_P;
1184 csa->lscsa->stopped_status.slot[1] = status_code;
1186 } else if ((csa->prob.spu_status_R & status_H) == status_H) {
1191 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_H;
1193 } else if ((csa->prob.spu_status_R & status_S) == status_S) {
1197 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_S;
1199 } else if ((csa->prob.spu_status_R & status_I) == status_I) {
1204 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_I;
1209 static inline void setup_spu_status_part2(struct spu_state *csa,
1228 if (!(csa->prob.spu_status_R & mask)) {
1229 csa->lscsa->stopped_status.slot[0] = SPU_STOPPED_STATUS_R;
1233 static inline void restore_mfc_rag(struct spu_state *csa, struct spu *spu)
1240 csa->priv1.resource_allocation_groupID_RW);
1242 csa->priv1.resource_allocation_enable_RW);
1245 static inline void send_restore_code(struct spu_state *csa, struct spu *spu)
1261 static inline void setup_decr(struct spu_state *csa, struct spu *spu)
1270 if (csa->priv2.mfc_control_RW & MFC_CNTL_DECREMENTER_RUNNING) {
1272 cycles_t delta_time = resume_time - csa->suspend_time;
1274 csa->lscsa->decr_status.slot[0] = SPU_DECR_STATUS_RUNNING;
1275 if (csa->lscsa->decr.slot[0] < delta_time) {
1276 csa->lscsa->decr_status.slot[0] |=
1280 csa->lscsa->decr.slot[0] -= delta_time;
1282 csa->lscsa->decr_status.slot[0] = 0;
1286 static inline void setup_ppu_mb(struct spu_state *csa, struct spu *spu)
1291 csa->lscsa->ppu_mb.slot[0] = csa->prob.pu_mb_R;
1294 static inline void setup_ppuint_mb(struct spu_state *csa, struct spu *spu)
1299 csa->lscsa->ppuint_mb.slot[0] = csa->priv2.puint_mb_R;
1302 static inline int check_restore_status(struct spu_state *csa, struct spu *spu)
1317 static inline void restore_spu_privcntl(struct spu_state *csa, struct spu *spu)
1324 out_be64(&priv2->spu_privcntl_RW, csa->priv2.spu_privcntl_RW);
1328 static inline void restore_status_part1(struct spu_state *csa, struct spu *spu)
1340 if (csa->prob.spu_status_R & mask) {
1348 static inline void restore_status_part2(struct spu_state *csa, struct spu *spu)
1363 if (!(csa->prob.spu_status_R & mask)) {
1375 static inline void restore_ls_16kb(struct spu_state *csa, struct spu *spu)
1377 unsigned long addr = (unsigned long)&csa->lscsa->ls[0];
1391 static inline void suspend_mfc(struct spu_state *csa, struct spu *spu)
1403 static inline void clear_interrupts(struct spu_state *csa, struct spu *spu)
1423 static inline void restore_mfc_queues(struct spu_state *csa, struct spu *spu)
1432 if ((csa->priv2.mfc_control_RW & MFC_CNTL_DMA_QUEUES_EMPTY_MASK) == 0) {
1435 csa->priv2.puq[i].mfc_cq_data0_RW);
1437 csa->priv2.puq[i].mfc_cq_data1_RW);
1439 csa->priv2.puq[i].mfc_cq_data2_RW);
1441 csa->priv2.puq[i].mfc_cq_data3_RW);
1445 csa->priv2.spuq[i].mfc_cq_data0_RW);
1447 csa->priv2.spuq[i].mfc_cq_data1_RW);
1449 csa->priv2.spuq[i].mfc_cq_data2_RW);
1451 csa->priv2.spuq[i].mfc_cq_data3_RW);
1457 static inline void restore_ppu_querymask(struct spu_state *csa, struct spu *spu)
1464 out_be32(&prob->dma_querymask_RW, csa->prob.dma_querymask_RW);
1468 static inline void restore_ppu_querytype(struct spu_state *csa, struct spu *spu)
1475 out_be32(&prob->dma_querytype_RW, csa->prob.dma_querytype_RW);
1479 static inline void restore_mfc_csr_tsq(struct spu_state *csa, struct spu *spu)
1487 csa->priv2.spu_tag_status_query_RW);
1491 static inline void restore_mfc_csr_cmd(struct spu_state *csa, struct spu *spu)
1499 out_be64(&priv2->spu_cmd_buf1_RW, csa->priv2.spu_cmd_buf1_RW);
1500 out_be64(&priv2->spu_cmd_buf2_RW, csa->priv2.spu_cmd_buf2_RW);
1504 static inline void restore_mfc_csr_ato(struct spu_state *csa, struct spu *spu)
1511 out_be64(&priv2->spu_atomic_status_RW, csa->priv2.spu_atomic_status_RW);
1514 static inline void restore_mfc_tclass_id(struct spu_state *csa, struct spu *spu)
1519 spu_mfc_tclass_id_set(spu, csa->priv1.mfc_tclass_id_RW);
1523 static inline void set_llr_event(struct spu_state *csa, struct spu *spu)
1536 ch0_cnt = csa->spu_chnlcnt_RW[0];
1537 ch0_data = csa->spu_chnldata_RW[0];
1538 ch1_data = csa->spu_chnldata_RW[1];
1539 csa->spu_chnldata_RW[0] |= MFC_LLR_LOST_EVENT;
1542 csa->spu_chnlcnt_RW[0] = 1;
1546 static inline void restore_decr_wrapped(struct spu_state *csa, struct spu *spu)
1553 if (!(csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED))
1556 if ((csa->spu_chnlcnt_RW[0] == 0) &&
1557 (csa->spu_chnldata_RW[1] & 0x20) &&
1558 !(csa->spu_chnldata_RW[0] & 0x20))
1559 csa->spu_chnlcnt_RW[0] = 1;
1561 csa->spu_chnldata_RW[0] |= 0x20;
1564 static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu)
1577 out_be64(&priv2->spu_chnldata_RW, csa->spu_chnldata_RW[idx]);
1578 out_be64(&priv2->spu_chnlcnt_RW, csa->spu_chnlcnt_RW[idx]);
1583 static inline void restore_ch_part2(struct spu_state *csa, struct spu *spu)
1595 ch_counts[1] = csa->spu_chnlcnt_RW[21];
1606 static inline void restore_spu_lslr(struct spu_state *csa, struct spu *spu)
1613 out_be64(&priv2->spu_lslr_RW, csa->priv2.spu_lslr_RW);
1617 static inline void restore_spu_cfg(struct spu_state *csa, struct spu *spu)
1624 out_be64(&priv2->spu_cfg_RW, csa->priv2.spu_cfg_RW);
1628 static inline void restore_pm_trace(struct spu_state *csa, struct spu *spu)
1636 static inline void restore_spu_npc(struct spu_state *csa, struct spu *spu)
1643 out_be32(&prob->spu_npc_RW, csa->prob.spu_npc_RW);
1647 static inline void restore_spu_mb(struct spu_state *csa, struct spu *spu)
1657 out_be64(&priv2->spu_chnlcnt_RW, csa->spu_chnlcnt_RW[29]);
1659 out_be64(&priv2->spu_chnldata_RW, csa->spu_mailbox_data[i]);
1664 static inline void check_ppu_mb_stat(struct spu_state *csa, struct spu *spu)
1673 if ((csa->prob.mb_stat_R & 0xFF) == 0) {
1679 static inline void check_ppuint_mb_stat(struct spu_state *csa, struct spu *spu)
1688 if ((csa->prob.mb_stat_R & 0xFF0000) == 0) {
1696 static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
1701 spu_mfc_sr1_set(spu, csa->priv1.mfc_sr1_RW);
1705 static inline void set_int_route(struct spu_state *csa, struct spu *spu)
1712 static inline void restore_other_spu_access(struct spu_state *csa,
1720 static inline void restore_spu_runcntl(struct spu_state *csa, struct spu *spu)
1728 if (csa->prob.spu_status_R & SPU_STATUS_RUNNING) {
1734 static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
1741 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
1747 * the csa, if the operational state was suspending or suspended. In
1754 static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
1764 static inline void reset_switch_active(struct spu_state *csa, struct spu *spu)
1772 static inline void reenable_interrupts(struct spu_state *csa, struct spu *spu)
1778 spu_int_mask_set(spu, 0, csa->priv1.int_mask_class0_RW);
1779 spu_int_mask_set(spu, 1, csa->priv1.int_mask_class1_RW);
1780 spu_int_mask_set(spu, 2, csa->priv1.int_mask_class2_RW);
2142 static void init_prob(struct spu_state *csa)
2144 csa->spu_chnlcnt_RW[9] = 1;
2145 csa->spu_chnlcnt_RW[21] = 16;
2146 csa->spu_chnlcnt_RW[23] = 1;
2147 csa->spu_chnlcnt_RW[28] = 1;
2148 csa->spu_chnlcnt_RW[30] = 1;
2149 csa->prob.spu_runcntl_RW = SPU_RUNCNTL_STOP;
2150 csa->prob.mb_stat_R = 0x000400;
2153 static void init_priv1(struct spu_state *csa)
2156 csa->priv1.mfc_sr1_RW = MFC_STATE1_LOCAL_STORAGE_DECODE_MASK |
2162 csa->priv1.int_mask_class0_RW = CLASS0_ENABLE_DMA_ALIGNMENT_INTR |
2165 csa->priv1.int_mask_class1_RW = CLASS1_ENABLE_SEGMENT_FAULT_INTR |
2167 csa->priv1.int_mask_class2_RW = CLASS2_ENABLE_SPU_STOP_INTR |
2172 static void init_priv2(struct spu_state *csa)
2174 csa->priv2.spu_lslr_RW = LS_ADDR_MASK;
2175 csa->priv2.mfc_control_RW = MFC_CNTL_RESUME_DMA_QUEUE |
2191 int spu_init_csa(struct spu_state *csa)
2195 if (!csa)
2197 memset(csa, 0, sizeof(struct spu_state));
2199 rc = spu_alloc_lscsa(csa);
2203 spin_lock_init(&csa->register_lock);
2205 init_prob(csa);
2206 init_priv1(csa);
2207 init_priv2(csa);
2212 void spu_fini_csa(struct spu_state *csa)
2214 spu_free_lscsa(csa);