Lines Matching refs:priv1
44 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
45 out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
52 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
53 out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
58 out_be64(&spu->priv1->int_mask_RW[class], mask);
63 return in_be64(&spu->priv1->int_mask_RW[class]);
68 out_be64(&spu->priv1->int_stat_RW[class], stat);
73 return in_be64(&spu->priv1->int_stat_RW[class]);
91 out_be64(&spu->priv1->int_route_RW, route);
96 return in_be64(&spu->priv1->mfc_dar_RW);
101 return in_be64(&spu->priv1->mfc_dsisr_RW);
106 out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
111 out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));
116 out_be64(&spu->priv1->mfc_sr1_RW, sr1);
121 return in_be64(&spu->priv1->mfc_sr1_RW);
126 out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
131 return in_be64(&spu->priv1->mfc_tclass_id_RW);
136 out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
141 out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
146 return in_be64(&spu->priv1->resource_allocation_groupID_RW);
151 out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
156 return in_be64(&spu->priv1->resource_allocation_enable_RW);