Lines Matching refs:gpt
12 * This file is a driver for the the General Purpose Timer (gpt) devices
22 * this prevents the use of any gpt0 gpt function (i.e. they will fail with
23 * -EBUSY). Thus, the safety wdt function always has precedence over the gpt
29 * to the device tree node for the gpt device (typically in the .dts file
37 * be added to the device tree node for the gpt device:
72 MODULE_DESCRIPTION("Freescale MPC52xx gpt driver");
84 * if the gpt may be used as wdt, bit 1 (MPC52xx_GPT_IS_WDT) indicates
85 * if the timer is actively used as wdt which blocks gpt functions
139 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
142 spin_lock_irqsave(&gpt->lock, flags);
143 setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
144 spin_unlock_irqrestore(&gpt->lock, flags);
149 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
152 spin_lock_irqsave(&gpt->lock, flags);
153 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
154 spin_unlock_irqrestore(&gpt->lock, flags);
159 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
161 out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
166 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
170 dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
172 spin_lock_irqsave(&gpt->lock, flags);
173 reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;
178 out_be32(&gpt->regs->mode, reg);
179 spin_unlock_irqrestore(&gpt->lock, flags);
194 struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
198 status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK;
200 sub_virq = irq_linear_revmap(gpt->irqhost, 0);
208 struct mpc52xx_gpt_priv *gpt = h->host_data;
210 dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
211 set_irq_chip_data(virq, gpt);
222 struct mpc52xx_gpt_priv *gpt = h->host_data;
224 dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);
227 dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);
243 mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
253 gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
255 if (!gpt->irqhost) {
256 dev_err(gpt->dev, "irq_alloc_host() failed\n");
260 gpt->irqhost->host_data = gpt;
261 set_irq_data(cascade_virq, gpt);
267 spin_lock_irqsave(&gpt->lock, flags);
268 mode = in_be32(&gpt->regs->mode);
270 out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC);
271 spin_unlock_irqrestore(&gpt->lock, flags);
273 dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);
288 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
290 return (in_be32(&gpt->regs->status) >> 8) & 1;
296 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
300 dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v);
303 spin_lock_irqsave(&gpt->lock, flags);
304 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r);
305 spin_unlock_irqrestore(&gpt->lock, flags);
310 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
313 dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
315 spin_lock_irqsave(&gpt->lock, flags);
316 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK);
317 spin_unlock_irqrestore(&gpt->lock, flags);
330 mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
339 gpt->gc.label = kstrdup(node->full_name, GFP_KERNEL);
340 if (!gpt->gc.label) {
341 dev_err(gpt->dev, "out of memory\n");
345 gpt->gc.ngpio = 1;
346 gpt->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
347 gpt->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
348 gpt->gc.get = mpc52xx_gpt_gpio_get;
349 gpt->gc.set = mpc52xx_gpt_gpio_set;
350 gpt->gc.base = -1;
351 gpt->gc.of_node = node;
354 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
357 rc = gpiochip_add(&gpt->gc);
359 dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
361 dev_dbg(gpt->dev, "%s() complete.\n", __func__);
378 struct mpc52xx_gpt_priv *gpt;
384 gpt = container_of(pos, struct mpc52xx_gpt_priv, list);
385 if (gpt->irqhost && irq == irq_linear_revmap(gpt->irqhost, 0)) {
387 return gpt;
396 static int mpc52xx_gpt_do_start(struct mpc52xx_gpt_priv *gpt, u64 period,
416 clocks = period * (u64)gpt->ipb_freq;
443 /* Set and enable the timer, reject an attempt to use a wdt as gpt */
444 spin_lock_irqsave(&gpt->lock, flags);
446 gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;
447 else if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {
448 spin_unlock_irqrestore(&gpt->lock, flags);
451 out_be32(&gpt->regs->count, prescale << 16 | clocks);
452 clrsetbits_be32(&gpt->regs->mode, clear, set);
453 spin_unlock_irqrestore(&gpt->lock, flags);
460 * @gpt: Pointer to gpt private data structure
466 int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,
469 return mpc52xx_gpt_do_start(gpt, period, continuous, 0);
474 * mpc52xx_gpt_stop_timer - Stop a gpt
475 * @gpt: Pointer to gpt private data structure
479 int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)
483 /* reject the operation if the timer is used as watchdog (gpt 0 only) */
484 spin_lock_irqsave(&gpt->lock, flags);
485 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) {
486 spin_unlock_irqrestore(&gpt->lock, flags);
490 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_COUNTER_ENABLE);
491 spin_unlock_irqrestore(&gpt->lock, flags);
498 * @gpt: Pointer to gpt private data structure
502 u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt)
508 spin_lock_irqsave(&gpt->lock, flags);
509 period = in_be32(&gpt->regs->count);
510 spin_unlock_irqrestore(&gpt->lock, flags);
517 do_div(period, (u64)gpt->ipb_freq);
532 /* wdt-capable gpt */
685 static int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,
690 /* remember the gpt for the wdt operation */
691 mpc52xx_gpt_wdt = gpt;
698 if (mpc52xx_gpt_do_start(gpt, real_timeout, 0, 1))
699 dev_warn(gpt->dev, "starting as wdt failed\n");
701 dev_info(gpt->dev, "watchdog set to %us timeout\n", *period);
712 static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,
726 struct mpc52xx_gpt_priv *gpt;
728 gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
729 if (!gpt)
732 spin_lock_init(&gpt->lock);
733 gpt->dev = &ofdev->dev;
734 gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node);
735 gpt->regs = of_iomap(ofdev->dev.of_node, 0);
736 if (!gpt->regs) {
737 kfree(gpt);
741 dev_set_drvdata(&ofdev->dev, gpt);
743 mpc52xx_gpt_gpio_setup(gpt, ofdev->dev.of_node);
744 mpc52xx_gpt_irq_setup(gpt, ofdev->dev.of_node);
747 list_add(&gpt->list, &mpc52xx_gpt_list);
755 gpt->wdt_mode = MPC52xx_GPT_CAN_WDT;
759 dev_info(gpt->dev, "used as watchdog\n");
760 gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;
762 dev_info(gpt->dev, "can function as watchdog\n");
763 mpc52xx_gpt_wdt_setup(gpt, on_boot_wdt);
775 { .compatible = "fsl,mpc5200-gpt", },
778 { .compatible = "fsl,mpc5200-gpt-gpio", },
779 { .compatible = "mpc5200-gpt", },
785 .name = "mpc52xx-gpt",