Lines Matching refs:PCI_BASE
56 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
58 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
89 outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
90 outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
91 outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
92 outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
95 outl(0x00000001, PCI_BASE | PCI_IO);
98 outl(0xca, PCI_BASE | PCI_UNLOCKREG);
105 outl(0x00000000, PCI_BASE | PCI_BASE10);
112 outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */
113 outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */
125 PCI_BASE |
127 outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */