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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/mm/

Lines Matching refs:RT

26 	RT = 0x002,
92 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
93 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
94 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
95 { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
96 { insn_beq, M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
97 { insn_beql, M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
102 { insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
103 { insn_cache, M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
104 { insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
105 { insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
106 { insn_dmfc0, M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
107 { insn_dmtc0, M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
108 { insn_dsll, M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE },
109 { insn_dsll32, M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE },
110 { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE },
111 { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
112 { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
113 { insn_drotr, M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE },
114 { insn_drotr32, M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE },
115 { insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
118 { insn_ins, M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE },
119 { insn_ext, M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE },
123 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
124 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
125 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
126 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
127 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
128 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
129 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
130 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
131 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
132 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
134 { insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
135 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
136 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
137 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
138 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
139 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
140 { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE },
141 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD },
142 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
147 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
148 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
149 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
150 { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
152 { insn_bbit0, M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
153 { insn_bbit1, M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
154 { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD },
155 { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
268 if (ip->fields & RT)