Lines Matching refs:icache
178 unsigned long end = start + current_cpu_data.icache.waysize;
179 unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
180 unsigned long ws_end = current_cpu_data.icache.ways <<
181 current_cpu_data.icache.waybit;
207 unsigned long indexmask = current_cpu_data.icache.waysize - 1;
210 unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
211 unsigned long ws_end = current_cpu_data.icache.ways <<
212 current_cpu_data.icache.waybit;
729 /* RM7000 erratum #31. The icache is screwed at startup. */
774 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
775 c->icache.ways = 2;
776 c->icache.waybit = __ffs(icache_size/2);
789 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
790 c->icache.ways = 2;
791 c->icache.waybit= 0;
803 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
804 c->icache.ways = 4;
805 c->icache.waybit= 0;
824 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
825 c->icache.ways = 1;
826 c->icache.waybit = 0; /* doesn't matter */
840 c->icache.linesz = 64;
841 c->icache.ways = 2;
842 c->icache.waybit = 0;
865 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
866 c->icache.ways = 2;
867 c->icache.waybit = __ffs(icache_size/2);
882 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
883 c->icache.ways = 1;
884 c->icache.waybit = 0; /* doesn't matter */
899 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
900 c->icache.ways = 4;
901 c->icache.waybit = __ffs(icache_size / c->icache.ways);
916 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
918 c->icache.ways = 4;
920 c->icache.ways = 2;
921 c->icache.waybit = 0;
943 c->icache.linesz = 2 << lsize;
945 c->icache.linesz = lsize;
946 c->icache.sets = 32 << (((config1 >> 22) + 1) & 7);
947 c->icache.ways = 1 + ((config1 >> 16) & 7);
949 icache_size = c->icache.sets *
950 c->icache.ways *
951 c->icache.linesz;
952 c->icache.waybit = __ffs(icache_size/c->icache.ways);
955 c->icache.flags |= MIPS_CACHE_VTAG;
987 !(config & CONF_SC) && c->icache.linesz != 16 &&
992 c->icache.waysize = icache_size / c->icache.ways;
995 c->icache.sets = c->icache.linesz ?
996 icache_size / (c->icache.linesz * c->icache.ways) : 0;
1064 c->icache.flags |= MIPS_CACHE_VTAG;
1068 c->icache.flags |= MIPS_CACHE_IC_F_DC;
1074 * LOONGSON2 has 4 way icache, but when using indexed cache op,
1077 c->icache.ways = 1;
1081 icache_size >> 10, way_string[c->icache.ways],
1082 c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT",
1083 c->icache.linesz);