Lines Matching defs:config
763 unsigned int config = read_c0_config();
773 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
774 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
778 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
779 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
788 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
789 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
793 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
794 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
802 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
803 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
807 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
808 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
823 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
824 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
828 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
829 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
839 icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
844 dcache_size = 1 << (12 + ((config & R10K_CONF_DC) >> 26));
853 write_c0_config(config & ~VR41_CONF_P4K);
857 config |= 0x00400000U;
859 config |= VR41_CONF_BP;
860 write_c0_config(config);
864 icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
865 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
869 dcache_size = 1 << (10 + ((config & CONF_DC) >> 6));
870 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
881 icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
882 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
886 dcache_size = 1 << (10 + ((config & CONF_DC) >> 6));
887 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
898 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
899 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
903 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
904 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
915 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
916 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
923 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
924 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
933 if (!(config & MIPS_CONF_M))
954 if (config & 0x8) /* VI bit */
987 !(config & CONF_SC) && c->icache.linesz != 16 &&
1062 * the config register.
1102 unsigned int config = read_c0_config();
1105 if (config & CONF_SC)
1147 c->scache.linesz = 16 << ((config & R4K_CONF_SB) >> 22);
1179 unsigned int config = read_c0_config();
1200 scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
1201 c->scache.linesz = 64 << ((config >> 13) & 1);