Lines Matching refs:xcp
732 static inline int cop1_64bit(struct pt_regs *xcp)
735 return xcp->cp0_status & ST0_FR;
743 #define SIFROMREG(si, x) ((si) = cop1_64bit(xcp) || !(x & 1) ? \
746 #define SITOREG(si, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = \
747 cop1_64bit(xcp) || !(x & 1) ? \
751 #define DIFROMREG(di, x) ((di) = ctx->fpr[x & ~(cop1_64bit(xcp) == 0)])
752 #define DITOREG(di, x) (ctx->fpr[x & ~(cop1_64bit(xcp) == 0)] = (di))
764 static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
768 unsigned long contpc = xcp->cp0_epc + dec_insn.pc_inc;
772 if (xcp->cp0_cause & CAUSEF_BD) {
774 if (!mm_isBranchInstr(xcp, dec_insn, &contpc))
775 xcp->cp0_cause &= ~CAUSEF_BD;
777 if (!isBranchInstr(xcp, dec_insn, &contpc))
778 xcp->cp0_cause &= ~CAUSEF_BD;
782 if (xcp->cp0_cause & CAUSEF_BD) {
822 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
843 u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
863 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
883 u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
909 DIFROMREG(xcp->regs[MIPSInst_RT(ir)],
916 DITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
923 SIFROMREG(xcp->regs[MIPSInst_RT(ir)],
930 SITOREG(xcp->regs[MIPSInst_RT(ir)], MIPSInst_RD(ir));
943 (void *) (xcp->cp0_epc),
952 xcp->regs[MIPSInst_RT(ir)] = value;
963 value = xcp->regs[MIPSInst_RT(ir)];
970 (void *) (xcp->cp0_epc),
991 if (xcp->cp0_cause & CAUSEF_BD)
1014 xcp->cp0_cause |= CAUSEF_BD;
1019 xcp->cp0_epc += dec_insn.pc_inc;
1024 contpc = (xcp->cp0_epc + (contpc << 1));
1039 return mips_dsemul(xcp, ir, contpc);
1042 contpc = (xcp->cp0_epc + (contpc << 2));
1069 return mips_dsemul(xcp, ir, contpc);
1078 xcp->cp0_epc += dec_insn.pc_inc;
1096 if ((sig = fpu_emu(xcp, ctx, ir)))
1104 int sig = fpux_emu(xcp, ctx, ir, fault_addr);
1117 xcp->regs[MIPSInst_RD(ir)] =
1118 xcp->regs[MIPSInst_RS(ir)];
1127 xcp->cp0_epc = contpc;
1128 xcp->cp0_cause &= ~CAUSEF_BD;
1200 static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1217 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1218 xcp->regs[MIPSInst_FT(ir)]);
1235 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1236 xcp->regs[MIPSInst_FT(ir)]);
1306 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1307 xcp->regs[MIPSInst_FT(ir)]);
1324 va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
1325 xcp->regs[MIPSInst_FT(ir)]);
1388 static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1449 if (xcp->regs[MIPSInst_FT(ir)] != 0)
1454 if (xcp->regs[MIPSInst_FT(ir)] == 0)
1634 if (xcp->regs[MIPSInst_FT(ir)] != 0)
1639 if (xcp->regs[MIPSInst_FT(ir)] == 0)
1862 int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1871 oldepc = xcp->cp0_epc;
1873 prevepc = xcp->cp0_epc;
1875 if (is16mode(xcp) && cpu_has_mmips) {
1877 if ((get_user(instr[0], (u16 __user *)(xcp->cp0_epc & ~MIPS_ISA_MODE))) ||
1878 (get_user(instr[1], (u16 __user *)((xcp->cp0_epc+2) & ~MIPS_ISA_MODE))) ||
1879 (get_user(instr[2], (u16 __user *)((xcp->cp0_epc+4) & ~MIPS_ISA_MODE))) ||
1880 (get_user(instr[3], (u16 __user *)((xcp->cp0_epc+6) & ~MIPS_ISA_MODE)))) {
1905 if ((get_user(dec_insn.insn, (mips_instruction __user *) xcp->cp0_epc)) ||
1906 (get_user(dec_insn.next_insn, (mips_instruction __user *)(xcp->cp0_epc+4)))) {
1917 xcp->cp0_epc += dec_insn.pc_inc; /* skip nops */
1927 sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr);
1938 } while (xcp->cp0_epc > prevepc);
1941 if (sig == SIGILL && xcp->cp0_epc != oldepc)