Lines Matching defs:fcr31
432 unsigned int fcr31;
498 asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
500 fcr31 = current->thread.fpu.fcr31;
504 fcr31 = ~fcr31;
509 if (fcr31 & (1 << bit))
595 unsigned int fcr31;
691 asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
693 fcr31 = current->thread.fpu.fcr31;
702 if (~fcr31 & (1 << bit))
710 if (fcr31 & (1 << bit))
938 value = ctx->fcr31;
978 ctx->fcr31 = (value &
982 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
995 cond = ctx->fcr31 & fpucondbit[MIPSInst_RT(ir) >> 2];
997 cond = ctx->fcr31 & FPU_CSR_COND;
1116 if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
1283 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
1284 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1286 ctx->fcr31); */
1443 if (((ctx->fcr31 & cond) != 0) !=
1628 if (((ctx->fcr31 & cond) != 0) !=
1819 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
1820 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
1821 /*printk ("SIGFPE: fpu csr = %08x\n",ctx->fcr31); */
1836 ctx->fcr31 |= cond;
1838 ctx->fcr31 &= ~cond;
1921 * ctx->fcr31. No need to copy ctx->fcr31 to