Lines Matching defs:MSP_CIC_INTBASE
60 #define MSP_CIC_INTBASE (MSP_MIPS_INTBASE + 8)
61 #define MSP_INT_EXT0 (MSP_CIC_INTBASE + 0)
63 #define MSP_INT_EXT1 (MSP_CIC_INTBASE + 1)
65 #define MSP_INT_EXT2 (MSP_CIC_INTBASE + 2)
67 #define MSP_INT_EXT3 (MSP_CIC_INTBASE + 3)
69 #define MSP_INT_CPUIF (MSP_CIC_INTBASE + 4)
71 #define MSP_INT_EXT4 (MSP_CIC_INTBASE + 5)
73 #define MSP_INT_CIC_USB (MSP_CIC_INTBASE + 6)
75 #define MSP_INT_MBOX (MSP_CIC_INTBASE + 7)
77 #define MSP_INT_EXT5 (MSP_CIC_INTBASE + 8)
79 #define MSP_INT_TDM (MSP_CIC_INTBASE + 9)
81 #define MSP_INT_CIC_MAC0 (MSP_CIC_INTBASE + 10)
83 #define MSP_INT_CIC_MAC1 (MSP_CIC_INTBASE + 11)
85 #define MSP_INT_CIC_SEC (MSP_CIC_INTBASE + 12)
87 #define MSP_INT_PER (MSP_CIC_INTBASE + 13)
89 #define MSP_INT_TIMER0 (MSP_CIC_INTBASE + 14)
91 #define MSP_INT_TIMER1 (MSP_CIC_INTBASE + 15)
93 #define MSP_INT_TIMER2 (MSP_CIC_INTBASE + 16)
95 #define MSP_INT_VPE0_TIMER (MSP_CIC_INTBASE + 17)
97 #define MSP_INT_BLKCP (MSP_CIC_INTBASE + 18)
99 #define MSP_INT_UART0 (MSP_CIC_INTBASE + 19)
101 #define MSP_INT_PCI (MSP_CIC_INTBASE + 20)
103 #define MSP_INT_EXT6 (MSP_CIC_INTBASE + 21)
105 #define MSP_INT_PCI_MSI (MSP_CIC_INTBASE + 22)
107 #define MSP_INT_CIC_SAR (MSP_CIC_INTBASE + 23)
109 #define MSP_INT_DSL (MSP_CIC_INTBASE + 24)
111 #define MSP_INT_CIC_ERR (MSP_CIC_INTBASE + 25)
113 #define MSP_INT_VPE1_TIMER (MSP_CIC_INTBASE + 26)
115 #define MSP_INT_VPE0_PC (MSP_CIC_INTBASE + 27)
117 #define MSP_INT_VPE1_PC (MSP_CIC_INTBASE + 28)
119 #define MSP_INT_EXT7 (MSP_CIC_INTBASE + 29)
121 #define MSP_INT_VPE0_SW (MSP_CIC_INTBASE + 30)
123 #define MSP_INT_VPE1_SW (MSP_CIC_INTBASE + 31)
129 #define MSP_PER_INTBASE (MSP_CIC_INTBASE + 32)