Lines Matching refs:_ULCAST_
35 #define _ULCAST_
37 #define _ULCAST_ (unsigned long)
268 #define PG_RIE (_ULCAST_(1) << 31)
269 #define PG_XIE (_ULCAST_(1) << 30)
270 #define PG_ELPA (_ULCAST_(1) << 29)
271 #define PG_ESP (_ULCAST_(1) << 28)
276 #define IE_SW0 (_ULCAST_(1) << 8)
277 #define IE_SW1 (_ULCAST_(1) << 9)
278 #define IE_IRQ0 (_ULCAST_(1) << 10)
279 #define IE_IRQ1 (_ULCAST_(1) << 11)
280 #define IE_IRQ2 (_ULCAST_(1) << 12)
281 #define IE_IRQ3 (_ULCAST_(1) << 13)
282 #define IE_IRQ4 (_ULCAST_(1) << 14)
283 #define IE_IRQ5 (_ULCAST_(1) << 15)
288 #define C_SW0 (_ULCAST_(1) << 8)
289 #define C_SW1 (_ULCAST_(1) << 9)
290 #define C_IRQ0 (_ULCAST_(1) << 10)
291 #define C_IRQ1 (_ULCAST_(1) << 11)
292 #define C_IRQ2 (_ULCAST_(1) << 12)
293 #define C_IRQ3 (_ULCAST_(1) << 13)
294 #define C_IRQ4 (_ULCAST_(1) << 14)
295 #define C_IRQ5 (_ULCAST_(1) << 15)
337 #define ST0_UM (_ULCAST_(1) << 4)
338 #define ST0_IL (_ULCAST_(1) << 23)
339 #define ST0_DL (_ULCAST_(1) << 24)
384 #define STATUSF_IP0 (_ULCAST_(1) << 8)
386 #define STATUSF_IP1 (_ULCAST_(1) << 9)
388 #define STATUSF_IP2 (_ULCAST_(1) << 10)
390 #define STATUSF_IP3 (_ULCAST_(1) << 11)
392 #define STATUSF_IP4 (_ULCAST_(1) << 12)
394 #define STATUSF_IP5 (_ULCAST_(1) << 13)
396 #define STATUSF_IP6 (_ULCAST_(1) << 14)
398 #define STATUSF_IP7 (_ULCAST_(1) << 15)
400 #define STATUSF_IP8 (_ULCAST_(1) << 0)
402 #define STATUSF_IP9 (_ULCAST_(1) << 1)
404 #define STATUSF_IP10 (_ULCAST_(1) << 2)
406 #define STATUSF_IP11 (_ULCAST_(1) << 3)
408 #define STATUSF_IP12 (_ULCAST_(1) << 4)
410 #define STATUSF_IP13 (_ULCAST_(1) << 5)
412 #define STATUSF_IP14 (_ULCAST_(1) << 6)
414 #define STATUSF_IP15 (_ULCAST_(1) << 7)
435 #define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI)
437 #define INTCTLF_IPTI (_ULCAST_(7) << INTCTLB_IPTI)
445 #define CAUSEF_EXCCODE (_ULCAST_(31) << 2)
447 #define CAUSEF_IP (_ULCAST_(255) << 8)
449 #define CAUSEF_IP0 (_ULCAST_(1) << 8)
451 #define CAUSEF_IP1 (_ULCAST_(1) << 9)
453 #define CAUSEF_IP2 (_ULCAST_(1) << 10)
455 #define CAUSEF_IP3 (_ULCAST_(1) << 11)
457 #define CAUSEF_IP4 (_ULCAST_(1) << 12)
459 #define CAUSEF_IP5 (_ULCAST_(1) << 13)
461 #define CAUSEF_IP6 (_ULCAST_(1) << 14)
463 #define CAUSEF_IP7 (_ULCAST_(1) << 15)
465 #define CAUSEF_IV (_ULCAST_(1) << 23)
467 #define CAUSEF_CE (_ULCAST_(3) << 28)
469 #define CAUSEF_TI (_ULCAST_(1) << 30)
471 #define CAUSEF_BD (_ULCAST_(1) << 31)
486 #define CONF_BE (_ULCAST_(1) << 15)
489 #define CONF_CU (_ULCAST_(1) << 3)
490 #define CONF_DB (_ULCAST_(1) << 4)
491 #define CONF_IB (_ULCAST_(1) << 5)
492 #define CONF_DC (_ULCAST_(7) << 6)
493 #define CONF_IC (_ULCAST_(7) << 9)
494 #define CONF_EB (_ULCAST_(1) << 13)
495 #define CONF_EM (_ULCAST_(1) << 14)
496 #define CONF_SM (_ULCAST_(1) << 16)
497 #define CONF_SC (_ULCAST_(1) << 17)
498 #define CONF_EW (_ULCAST_(3) << 18)
499 #define CONF_EP (_ULCAST_(15)<< 24)
500 #define CONF_EC (_ULCAST_(7) << 28)
501 #define CONF_CM (_ULCAST_(1) << 31)
504 #define R4K_CONF_SW (_ULCAST_(1) << 20)
505 #define R4K_CONF_SS (_ULCAST_(1) << 21)
506 #define R4K_CONF_SB (_ULCAST_(3) << 22)
509 #define R5K_CONF_SE (_ULCAST_(1) << 12)
510 #define R5K_CONF_SS (_ULCAST_(3) << 20)
513 #define RM7K_CONF_SE (_ULCAST_(1) << 3)
514 #define RM7K_CONF_TE (_ULCAST_(1) << 12)
515 #define RM7K_CONF_CLK (_ULCAST_(1) << 16)
516 #define RM7K_CONF_TC (_ULCAST_(1) << 17)
517 #define RM7K_CONF_SI (_ULCAST_(3) << 20)
518 #define RM7K_CONF_SC (_ULCAST_(1) << 31)
521 #define R10K_CONF_DN (_ULCAST_(3) << 3)
522 #define R10K_CONF_CT (_ULCAST_(1) << 5)
523 #define R10K_CONF_PE (_ULCAST_(1) << 6)
524 #define R10K_CONF_PM (_ULCAST_(3) << 7)
525 #define R10K_CONF_EC (_ULCAST_(15)<< 9)
526 #define R10K_CONF_SB (_ULCAST_(1) << 13)
527 #define R10K_CONF_SK (_ULCAST_(1) << 14)
528 #define R10K_CONF_SS (_ULCAST_(7) << 16)
529 #define R10K_CONF_SC (_ULCAST_(7) << 19)
530 #define R10K_CONF_DC (_ULCAST_(7) << 26)
531 #define R10K_CONF_IC (_ULCAST_(7) << 29)
534 #define VR41_CONF_CS (_ULCAST_(1) << 12)
535 #define VR41_CONF_P4K (_ULCAST_(1) << 13)
536 #define VR41_CONF_BP (_ULCAST_(1) << 16)
537 #define VR41_CONF_M16 (_ULCAST_(1) << 20)
538 #define VR41_CONF_AD (_ULCAST_(1) << 23)
541 #define R30XX_CONF_FDM (_ULCAST_(1) << 19)
542 #define R30XX_CONF_REV (_ULCAST_(1) << 22)
543 #define R30XX_CONF_AC (_ULCAST_(1) << 23)
544 #define R30XX_CONF_RF (_ULCAST_(1) << 24)
545 #define R30XX_CONF_HALT (_ULCAST_(1) << 25)
546 #define R30XX_CONF_FPINT (_ULCAST_(7) << 26)
547 #define R30XX_CONF_DBR (_ULCAST_(1) << 29)
548 #define R30XX_CONF_SB (_ULCAST_(1) << 30)
549 #define R30XX_CONF_LOCK (_ULCAST_(1) << 31)
552 #define TX49_CONF_DC (_ULCAST_(1) << 16)
553 #define TX49_CONF_IC (_ULCAST_(1) << 17) /* conflict with CONF_SC */
554 #define TX49_CONF_HALT (_ULCAST_(1) << 18)
555 #define TX49_CONF_CWFON (_ULCAST_(1) << 27)
558 #define MIPS_CONF_MT (_ULCAST_(7) << 7)
559 #define MIPS_CONF_AR (_ULCAST_(7) << 10)
560 #define MIPS_CONF_AT (_ULCAST_(3) << 13)
561 #define MIPS_CONF_M (_ULCAST_(1) << 31)
566 #define MIPS_CONF1_FP (_ULCAST_(1) << 0)
567 #define MIPS_CONF1_EP (_ULCAST_(1) << 1)
568 #define MIPS_CONF1_CA (_ULCAST_(1) << 2)
569 #define MIPS_CONF1_WR (_ULCAST_(1) << 3)
570 #define MIPS_CONF1_PC (_ULCAST_(1) << 4)
571 #define MIPS_CONF1_MD (_ULCAST_(1) << 5)
572 #define MIPS_CONF1_C2 (_ULCAST_(1) << 6)
573 #define MIPS_CONF1_DA (_ULCAST_(7) << 7)
574 #define MIPS_CONF1_DL (_ULCAST_(7) << 10)
575 #define MIPS_CONF1_DS (_ULCAST_(7) << 13)
576 #define MIPS_CONF1_IA (_ULCAST_(7) << 16)
577 #define MIPS_CONF1_IL (_ULCAST_(7) << 19)
578 #define MIPS_CONF1_IS (_ULCAST_(7) << 22)
579 #define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25)
581 #define MIPS_CONF2_SA (_ULCAST_(15)<< 0)
582 #define MIPS_CONF2_SL (_ULCAST_(15)<< 4)
583 #define MIPS_CONF2_SS (_ULCAST_(15)<< 8)
584 #define MIPS_CONF2_SU (_ULCAST_(15)<< 12)
585 #define MIPS_CONF2_TA (_ULCAST_(15)<< 16)
586 #define MIPS_CONF2_TL (_ULCAST_(15)<< 20)
587 #define MIPS_CONF2_TS (_ULCAST_(15)<< 24)
588 #define MIPS_CONF2_TU (_ULCAST_(7) << 28)
590 #define MIPS_CONF3_TL (_ULCAST_(1) << 0)
591 #define MIPS_CONF3_SM (_ULCAST_(1) << 1)
592 #define MIPS_CONF3_MT (_ULCAST_(1) << 2)
593 #define MIPS_CONF3_SP (_ULCAST_(1) << 4)
594 #define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
595 #define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
596 #define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
597 #define MIPS_CONF3_CTXTC (_ULCAST_(1) << 9)
598 #define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
599 #define MIPS_CONF3_ULRI (_ULCAST_(1) << 13)
600 #define MIPS_CONF3_ISA (_ULCAST_(3) << 14)
602 #define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0)
603 #define MIPS_CONF4_MMUEXTDEF (_ULCAST_(3) << 14)
604 #define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT (_ULCAST_(1) << 14)
606 #define MIPS_CONF6_SYND (_ULCAST_(1) << 13)
608 #define MIPS_CONF7_WII (_ULCAST_(1) << 31)
609 #define MIPS_CONF7_AR (_ULCAST_(1) << 16)
610 #define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
616 #define MIPS_FPIR_S (_ULCAST_(1) << 16)
617 #define MIPS_FPIR_D (_ULCAST_(1) << 17)
618 #define MIPS_FPIR_PS (_ULCAST_(1) << 18)
619 #define MIPS_FPIR_3D (_ULCAST_(1) << 19)
620 #define MIPS_FPIR_W (_ULCAST_(1) << 20)
621 #define MIPS_FPIR_L (_ULCAST_(1) << 21)
622 #define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
1334 if ((res & _ULCAST_(1)))