Lines Matching refs:PORT
27 #define PORT(_base, _irq) \
40 PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
41 PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
42 PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
43 PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
45 PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
46 PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
48 PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
49 PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
50 PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
52 PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
53 PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
54 PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
56 PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
57 PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),