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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/m68k/ifpsp060/src/

Lines Matching refs:d3

287 set EXC_D3,		EXC_DREGS+(3*4)		# offset of d3
1339 mov.l %a0,%d3 # put base in d3
1455 mov.l %a0,%d3 # put base in d3
1491 # d3 = base (internal " " )
1511 clr.l %d3
1538 add.l %d0,%d3 # base += bd
1573 mov.l %d3,%a0
1584 add.l %d2,%d3 # preindexing
1585 mov.l %d3,%a0
1595 add.l %d2,%d3 # ea = (base + bd) + index
1596 mov.l %d3,%d0
1612 mov.l %d3,%a0 # pass failing address
1916 mov.l %d0,%d3 # save long lower bound
1925 mov.l %d3,%d0 # long lower bound in d0
1984 mov.w %cc, %d3 # fetch resulting ccodes
1985 andi.b &0x4, %d3 # keep 'Z' bit
1990 or.b %d4, %d3 # combine w/ earlier ccodes
1991 andi.b &0x5, %d3 # keep 'Z' and 'N'
1995 or.b %d3, %d4 # insert new ccodes
2292 mov.l %d7, %d3 # divisor
2295 swap %d3
2296 cmp.w %d2, %d3 # V1 = U1 ?
2303 divu.w %d3, %d1 # use quotient of mslw/msw
2314 ddadj1: mov.l %d7, %d3
2317 swap %d3
2318 mulu.w %d1, %d3 # V1q
2320 sub.l %d3, %d4 # U1U2 - V1q
2344 mov.l %d5, %d2 # now %d2,%d3 are trial*divisor
2345 mov.l %d6, %d3
2348 sub.l %d3, %d6
2356 mov.l %d7, %d3
2357 swap %d3
2358 clr.w %d3 # %d3 now ls word of divisor
2359 add.l %d3, %d6 # aligned with 3rd word of dividend
2361 mov.l %d7, %d3
2362 clr.w %d3 # %d3 now ms word of divisor
2363 swap %d3 # aligned with 2nd word of dividend
2364 add.l %d3, %d5
2400 # destroys %d2,%d3,%d4.
2404 mov.l %d6, %d3
2406 swap %d3
2409 mulu.w %d3, %d5 # %d5 <- msw-dest*lsw-source
2411 mulu.w %d4, %d3 # %d3 <- msw*msw
2416 addx.w %d4, %d3 # add any carry to m*m product
2418 addx.w %d4, %d3 # add any carry to m*m product
2425 add.l %d3, %d5 # %d5 now ms 32 bits of final product
2523 mov.l (EXC_DREGS,%a6,%d0.w*4), %d3 # fetch multiplier
2525 # multiplier is in %d3. now, extract Dl and Dh fields and fetch the
2539 tst.l %d3 # test multiplier
2542 # multiplier is in %d3 and multiplicand is in %d4.
2549 tst.l %d3 # is multiplier negative?
2551 neg.l %d3 # make multiplier positive
2582 mov.l %d3, %d5 # mr in %d5
2583 mov.l %d3, %d6 # mr in %d6
2589 mulu.w %d4, %d3 # [1] lo(mr) * lo(md)
2598 swap %d3 # hi([1]) <==> lo([1])
2599 add.w %d4, %d3 # hi([1]) + lo([2])
2601 add.w %d5, %d3 # hi([1]) + lo([3])
2603 swap %d3 # lo([1]) <==> hi([1])
2614 # unsigned result is now in {%d4,%d3}
2622 not.l %d3 # negate lo(result) bits
2624 addq.l &1, %d3 # add 1 to lo(result)
2632 mov.l %d3, (EXC_DREGS,%a6,%d2.w*4) # save lo(result)
2676 mov.l %d0, %d3 # store multiplier in %d3
2690 mov.l %d0,%d3
2780 mov.l (EXC_DREGS,%a6,%d0.w*4),%d3 # fetch Compare2 Op
2852 cmp.w %d1,%d3
2859 mov.w DC2(%a6),%d3 # fetch Dc2
2860 mov.w %d1,(2+EXC_DREGS,%a6,%d3.w*4) # store new Compare2 Op
2883 cmp.l %d1,%d3
2890 mov.w DC2(%a6),%d3 # fetch Dc2
2891 mov.l %d1,(EXC_DREGS,%a6,%d3.w*4) # store new Compare2 Op
3062 mov.w DC(%a6),%d3
3063 mov.w %d0,(EXC_DREGS+2,%a6,%d3.w*4) # Dc = destination
3083 mov.w DC(%a6),%d3
3084 mov.l %d0,(EXC_DREGS,%a6,%d3.w*4) # Dc = destination
3354 cmp.l %d1,%d3 # Dest2 - Compare2
3445 cmp.l %d1,%d3 # Dest2 - Compare2
3505 cmp.l %d1,%d3 # Dest2 - Compare2
3654 cmp.w %d1,%d3 # Dest2 - Compare2
3745 cmp.w %d1,%d3 # Dest2 - Compare2
3887 mov.l %d2,%d3 # d3 = update[7:0]
3946 movs.b %d3,(%a0) # Update[7:0] -> DEST+0x1
4045 mov.l %d2,%d3 # d3 = update[15:0]
4102 movs.w %d3,(%a0) # Update[15:0] -> DEST+0x2
4191 mov.l %d2,%d3 # d3 = Update[23:8]
4249 movs.w %d3,(%a0)+ # Update[23:8] -> DEST+0x1