Lines Matching defs:vrr
1003 union ia64_rr vrr;
1008 vrr.val = vcpu_get_rr(vcpu, vadr);
1009 vhpt_offset = ((vadr >> vrr.ps) << 3) & ((1UL << (vpta.size)) - 1);
1011 pval = ia64_call_vsa(PAL_VPS_THASH, vadr, vrr.val,
1022 union ia64_rr vrr;
1027 vrr.val = vcpu_get_rr(vcpu, vadr);
1029 pval = ia64_call_vsa(PAL_VPS_TTAG, vadr, vrr.val,
1433 vcpu->arch.vrr[reg >> VRN_SHIFT] = val;
2041 VMX(vcpu, vrr[0]) = 0x38;
2042 VMX(vcpu, vrr[1]) = 0x38;
2043 VMX(vcpu, vrr[2]) = 0x38;
2044 VMX(vcpu, vrr[3]) = 0x38;
2045 VMX(vcpu, vrr[4]) = 0x38;
2046 VMX(vcpu, vrr[5]) = 0x38;
2047 VMX(vcpu, vrr[6]) = 0x38;
2048 VMX(vcpu, vrr[7]) = 0x38;
2086 vcpu->arch.metaphysical_saved_rr0 = vrrtomrr(VMX(vcpu, vrr[VRN0]));
2087 vcpu->arch.metaphysical_saved_rr4 = vrrtomrr(VMX(vcpu, vrr[VRN4]));
2106 vrrtomrr(VMX(vcpu, vrr[VRN1])));
2109 vrrtomrr(VMX(vcpu, vrr[VRN2])));
2112 vrrtomrr(VMX(vcpu, vrr[VRN3])));
2115 vrrtomrr(VMX(vcpu, vrr[VRN5])));
2118 vrrtomrr(VMX(vcpu, vrr[VRN7])));