Lines Matching refs:inst
177 INST64 inst;
187 inst.inst = bundle.slot0;
191 inst.inst = slot1a + (slot1b << 18);
193 inst.inst = bundle.slot2;
196 if (inst.M1.major == 4 && inst.M1.m == 0 && inst.M1.x == 0) {
198 size = (inst.M1.x6 & 0x3);
199 if ((inst.M1.x6 >> 2) > 0xb) {
202 data = vcpu_get_gr(vcpu, inst.M4.r2);
203 } else if ((inst.M1.x6 >> 2) < 0xb) {
207 } else if (inst.M2.major == 4 && inst.M2.m == 1 && inst.M2.x == 0) {
211 size = (inst.M2.x6 & 0x3);
212 temp = vcpu_get_gr(vcpu, inst.M2.r3);
213 update_reg = vcpu_get_gr(vcpu, inst.M2.r2);
215 vcpu_set_gr(vcpu, inst.M2.r3, temp, 0);
216 } else if (inst.M3.major == 5) {
219 size = (inst.M3.x6&0x3);
220 if ((inst.M5.x6 >> 2) > 0xb) {
223 data = vcpu_get_gr(vcpu, inst.M5.r2);
224 temp = vcpu_get_gr(vcpu, inst.M5.r3);
225 imm = (inst.M5.s << 31) | (inst.M5.i << 30) |
226 (inst.M5.imm7 << 23);
228 vcpu_set_gr(vcpu, inst.M5.r3, temp, 0);
230 } else if ((inst.M3.x6 >> 2) < 0xb) {
233 temp = vcpu_get_gr(vcpu, inst.M3.r3);
234 imm = (inst.M3.s << 31) | (inst.M3.i << 30) |
235 (inst.M3.imm7 << 23);
237 vcpu_set_gr(vcpu, inst.M3.r3, temp, 0);
240 } else if (inst.M9.major == 6 && inst.M9.x6 == 0x3B
241 && inst.M9.m == 0 && inst.M9.x == 0) {
247 vcpu_get_fpreg(vcpu, inst.M9.f2, &v);
253 } else if (inst.M10.major == 7 && inst.M10.x6 == 0x3B) {
259 vcpu_get_fpreg(vcpu, inst.M10.f2, &v);
260 temp = vcpu_get_gr(vcpu, inst.M10.r3);
261 imm = (inst.M10.s << 31) | (inst.M10.i << 30) |
262 (inst.M10.imm7 << 23);
264 vcpu_set_gr(vcpu, inst.M10.r3, temp, 0);
271 } else if (inst.M10.major == 7 && inst.M10.x6 == 0x31) {
277 vcpu_get_fpreg(vcpu, inst.M10.f2, &v);
279 temp = vcpu_get_gr(vcpu, inst.M10.r3);
280 imm = (inst.M10.s << 31) | (inst.M10.i << 30) |
281 (inst.M10.imm7 << 23);
283 vcpu_set_gr(vcpu, inst.M10.r3, temp, 0);
284 } else if (inst.M15.major == 7 && inst.M15.x6 >= 0x2c
285 && inst.M15.x6 <= 0x2f) {
286 temp = vcpu_get_gr(vcpu, inst.M15.r3);
287 imm = (inst.M15.s << 31) | (inst.M15.i << 30) |
288 (inst.M15.imm7 << 23);
290 vcpu_set_gr(vcpu, inst.M15.r3, temp, 0);
294 } else if (inst.M12.major == 6 && inst.M12.m == 1
295 && inst.M12.x == 1 && inst.M12.x6 == 1) {
305 vcpu_set_fpreg(vcpu, inst.M12.f1, &v);
310 vcpu_set_fpreg(vcpu, inst.M12.f2, &v);
312 vcpu_set_gr(vcpu, inst.M12.r3, padr, 0);
328 vcpu_set_gr(vcpu, inst.M1.r1, data, 0);