Lines Matching refs:result
73 struct ia64_pal_retval result) {
79 p->u.pal_data.ret = result;
86 struct sal_ret_values result) {
91 p->u.sal_data.ret = result;
94 printk(KERN_WARNING"Failed to set sal result!!\n");
121 struct ia64_pal_retval result = {0, 0, 0, 0};
145 result.status = ia64_pal_cache_flush(gr29, gr30, &result.v1,
146 &result.v0);
148 if (result.status != 0)
151 vcpu, result.status, gr29, gr30);
153 return result;
159 struct ia64_pal_retval result;
161 PAL_CALL(result, PAL_CACHE_SUMMARY, 0, 0, 0);
162 return result;
168 struct ia64_pal_retval result;
170 PAL_CALL(result, PAL_FREQ_BASE, 0, 0, 0);
176 if (result.v0 == 0) {
177 result.status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
178 &result.v0,
179 &result.v1);
180 result.v2 = 0;
183 return result;
191 static void sn2_patch_itc_freq_ratios(struct ia64_pal_retval *result)
196 result->status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
198 ratio = (struct pal_freq_ratio *)&result->v2;
208 struct ia64_pal_retval result;
210 PAL_CALL(result, PAL_FREQ_RATIOS, 0, 0, 0);
213 sn2_patch_itc_freq_ratios(&result);
215 return result;
220 struct ia64_pal_retval result;
222 INIT_PAL_STATUS_UNIMPLEMENTED(result);
223 return result;
229 struct ia64_pal_retval result;
231 INIT_PAL_STATUS_SUCCESS(result);
232 return result;
238 struct ia64_pal_retval result = {0, 0, 0, 0};
242 result.status = ia64_pal_proc_get_features(&result.v0, &result.v1,
243 &result.v2, in2);
245 return result;
251 struct ia64_pal_retval result = {0, 0, 0, 0};
255 result.status = ia64_pal_register_info(in1, &result.v1, &result.v2);
257 return result;
282 struct ia64_pal_retval result;
284 PAL_CALL(result, PAL_VM_SUMMARY, 0, 0, 0);
285 if (!result.status) {
286 vminfo1.pvi1_val = result.v0;
289 result.v0 = vminfo1.pvi1_val;
292 result.v1 = vminfo2.pvi2_val;
295 return result;
300 struct ia64_pal_retval result;
305 result.status = ia64_pal_vm_info(in1, in2,
306 (pal_tc_info_u_t *)&result.v1, &result.v2);
308 return result;
390 struct ia64_pal_retval result = {0, 0, 0, 0};
393 result.status = ia64_pal_prefetch_visibility(in1);
394 if (result.status == 0) {
400 result.status = 1;
402 return result;
412 struct ia64_pal_retval result = {0, 0, 0, 0};
419 result.status = ia64_pal_get_brand_info(brand_info);
420 if (result.status == PAL_STATUS_SUCCESS)
423 result.status = PAL_STATUS_REQUIRES_MEMORY;
428 return result;
435 struct ia64_pal_retval result;
441 result = pal_cache_flush(vcpu);
444 result = pal_mem_attrib(vcpu);
447 result = pal_cache_summary(vcpu);
450 result = pal_perf_mon_info(vcpu);
453 result = pal_halt_info(vcpu);
457 INIT_PAL_STATUS_SUCCESS(result);
465 result = pal_prefetch_visibility(vcpu);
468 result.status = ia64_pal_mc_drain();
473 result = pal_freq_ratios(vcpu);
477 result = pal_freq_base(vcpu);
481 result = pal_logical_to_physica(vcpu);
485 result = pal_vm_summary(vcpu);
489 result = pal_vm_info(vcpu);
492 result = pal_platform_addr(vcpu);
495 result = pal_cache_info(vcpu);
498 INIT_PAL_STATUS_SUCCESS(result);
499 result.v1 = (1L << 32) | 1L;
502 result = pal_register_info(vcpu);
505 result.status = ia64_pal_vm_page_size(&result.v0,
506 &result.v1);
509 result.status = ia64_pal_rse_info(&result.v0,
510 (pal_hints_u_t *)&result.v1);
513 result = pal_proc_get_features(vcpu);
516 result.status = ia64_pal_debug_info(&result.v0,
517 &result.v1);
520 result.status = ia64_pal_version(
521 (pal_version_u_t *)&result.v0,
522 (pal_version_u_t *)&result.v1);
525 result.status = PAL_STATUS_SUCCESS;
526 result.v0 = vcpu->vcpu_id;
529 result = pal_get_brand_info(vcpu);
533 INIT_PAL_STATUS_UNIMPLEMENTED(result);
536 INIT_PAL_STATUS_UNIMPLEMENTED(result);
540 set_pal_result(vcpu, result);
656 struct sal_ret_values result;
661 result = sal_emulator(vcpu->kvm, index, in1, in2, in3,
663 set_sal_result(vcpu, result);