Lines Matching refs:r18
102 movl r18=PAGE_SHIFT
116 cmp.ne p8,p0=r18,r26
117 sub r27=r26,r18
119 (p8) dep r25=r18,r25,2,6
124 shr.u r18=r22,PGDIR_SHIFT // get bottom portion of pgd index bit
135 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
136 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
141 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
150 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
154 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
156 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pgd,addr)
165 (p7) ld8 r18=[r21] // read *pte
168 (p7) tbit.z p6,p7=r18,_PAGE_P_BIT // page present bit cleared?
174 ITC_I_AND_D(p10, p11, r18, r24) // insert the instruction TLB entry and
210 * r18 = *pte
226 (p7) cmp.ne.or.andcm p6,p7=r25,r18 // did *pte change
253 1: ld8 r18=[r17] // read *pte
256 tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
259 ITC_I(p0, r18, r19)
271 cmp.ne p7,p0=r18,r19
297 1: ld8 r18=[r17] // read *pte
300 tbit.z p6,p0=r18,_PAGE_P_BIT // page present bit cleared?
303 ITC_D(p0, r18, r19)
315 cmp.ne p7,p0=r18,r19
347 shr.u r18=r16,57 // move address bit 61 to bit 4
349 andcm r18=0x10,r18 // bit 4=~address-bit(61)
353 or r19=r19,r18 // set bit 4 (uncached) if the access was to region 6
356 ITC_I(p0, r19, r18) // insert the TLB entry
411 ITC_D(p7, r19, r18) // insert the TLB entry
440 * Clobbered: b0, r18, r19, r21, r22, psr.dt (cleared)
445 MOV_FROM_ITIR(r18)
448 extr.u r18=r18,2,6 // get the faulting page size
451 add r22=-PAGE_SHIFT,r18 // adjustment for hugetlb address
452 add r18=PGDIR_SHIFT-PAGE_SHIFT,r18
455 shr.u r18=r16,r18
465 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5
466 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4]
469 shr.u r18=r22,PUD_SHIFT // shift pud index into position
471 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
477 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr)
481 shr.u r18=r22,PMD_SHIFT // shift pmd index into position
484 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr)
530 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
536 1: ld8 r18=[r17]
537 ;; // avoid RAW on r18
538 mov ar.ccv=r18 // set compare value for cmpxchg
539 or r25=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
540 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
545 (p6) cmp.eq p6,p7=r26,r18 // Only compare if page is present
547 ITC_D(p6, r25, r18) // install updated PTE
555 ld8 r18=[r17] // read PTE again
557 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
564 1: ld8 r18=[r17]
565 ;; // avoid RAW on r18
566 or r18=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
569 st8 [r17]=r18 // store back updated PTE
570 ITC_D(p0, r18, r16) // install updated PTE
591 MOV_FROM_IIP(r18)
594 (p6) mov r16=r18 // if so, use cr.iip instead of cr.ifa
597 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
602 1: ld8 r18=[r17]
604 mov ar.ccv=r18 // set compare value for cmpxchg
605 or r25=_PAGE_A,r18 // set the accessed bit
606 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
611 (p6) cmp.eq p6,p7=r26,r18 // Only if page present
621 ld8 r18=[r17] // read PTE again
623 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
630 1: ld8 r18=[r17]
632 or r18=_PAGE_A,r18 // set the accessed bit
635 st8 [r17]=r18 // store back updated PTE
636 ITC_I(p0, r18, r16) // install updated PTE
651 THASH(p0, r17, r16, r18) // compute virtual address of L3 PTE
657 1: ld8 r18=[r17]
658 ;; // avoid RAW on r18
659 mov ar.ccv=r18 // set compare value for cmpxchg
660 or r25=_PAGE_A,r18 // set the dirty bit
661 tbit.z p7,p6 = r18,_PAGE_P_BIT // Check present bit
666 (p6) cmp.eq p6,p7=r26,r18 // Only if page is present
675 ld8 r18=[r17] // read PTE again
677 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
683 1: ld8 r18=[r17]
684 ;; // avoid RAW on r18
685 or r18=_PAGE_A,r18 // set the accessed bit
687 st8 [r17]=r18 // store back updated PTE
688 ITC_D(p0, r18, r16) // install updated PTE
721 mov r18=__IA64_BREAK_SYSCALL // A
739 cmp.eq p0,p7=r18,r17 // I0 is this a system call?
794 MOV_FROM_ITC(p0, p14, r30, r18) // M get cycle for accounting
801 mov r18=ar.bsp // M2 (12 cyc)
815 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // M get last stamp
820 sub r22=r19,r18 // A stime before leave
823 sub r18=r30,r19 // A elapsed time in user
826 add r21=r21,r18 // A sum utime
900 * - r18: saved bsp (after switching to kernel stack)
944 (pKStk) mov r18=r0 // make sure r18 isn't NaT
966 (pUStk) sub r18=r18,r22 // r18=RSE.ndirty*8
980 shl r18=r18,16 // compute ar.rsc to be used for "loadrs"
986 st8 [r16]=r18,PT(R12)-PT(LOADRS) // save ar.rsc value for "loadrs"
1050 ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP // time at last check in kernel
1055 sub r22=r19,r18 // stime before leave kernel
1058 sub r18=r20,r19 // elapsed time in user mode
1061 add r21=r21,r18 // sum utime
1189 and r18=0xf,r17 // r18 = cr.ipsr.code{3:0}
1192 cmp.ne.or p6,p0=IA64_ISR_CODE_LFETCH,r18
1196 MOV_TO_IPSR(p0, r16, r18)
1221 MOV_FROM_IIM(r18)
1224 shl r18=r18,43 // put sign bit in position (43=64-21)
1228 shr r18=r18,39 // sign extend (39=43-4)
1231 add r17=r17,r18 // now add the offset