Lines Matching defs:iprv
798 #define PAL_CALL(iprv,a0,a1,a2,a3) do { \
801 iprv = ia64_pal_call_static(a0, a1, a2, a3); \
805 #define PAL_CALL_STK(iprv,a0,a1,a2,a3) do { \
808 iprv = ia64_pal_call_stacked(a0, a1, a2, a3); \
812 #define PAL_CALL_PHYS(iprv,a0,a1,a2,a3) do { \
815 iprv = ia64_pal_call_phys_static(a0, a1, a2, a3); \
819 #define PAL_CALL_PHYS_STK(iprv,a0,a1,a2,a3) do { \
822 iprv = ia64_pal_call_phys_stacked(a0, a1, a2, a3); \
885 struct ia64_pal_retval iprv;
886 PAL_CALL_PHYS(iprv, PAL_BUS_GET_FEATURES, 0, 0, 0);
888 features_avail->pal_bus_features_val = iprv.v0;
890 features_status->pal_bus_features_val = iprv.v1;
892 features_control->pal_bus_features_val = iprv.v2;
893 return iprv.status;
900 struct ia64_pal_retval iprv;
901 PAL_CALL_PHYS(iprv, PAL_BUS_SET_FEATURES, feature_select.pal_bus_features_val, 0, 0);
902 return iprv.status;
909 struct ia64_pal_retval iprv;
911 PAL_CALL(iprv, PAL_CACHE_INFO, cache_level, cache_type, 0);
913 if (iprv.status == 0) {
914 conf->pcci_status = iprv.status;
915 conf->pcci_info_1.pcci1_data = iprv.v0;
916 conf->pcci_info_2.pcci2_data = iprv.v1;
917 conf->pcci_reserved = iprv.v2;
919 return iprv.status;
927 struct ia64_pal_retval iprv;
929 PAL_CALL(iprv, PAL_CACHE_PROT_INFO, cache_level, cache_type, 0);
931 if (iprv.status == 0) {
932 prot->pcpi_status = iprv.status;
933 prot->pcp_info[0].pcpi_data = iprv.v0 & 0xffffffff;
934 prot->pcp_info[1].pcpi_data = iprv.v0 >> 32;
935 prot->pcp_info[2].pcpi_data = iprv.v1 & 0xffffffff;
936 prot->pcp_info[3].pcpi_data = iprv.v1 >> 32;
937 prot->pcp_info[4].pcpi_data = iprv.v2 & 0xffffffff;
938 prot->pcp_info[5].pcpi_data = iprv.v2 >> 32;
940 return iprv.status;
950 struct ia64_pal_retval iprv;
951 PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress);
953 *vector = iprv.v0;
954 *progress = iprv.v1;
955 return iprv.status;
963 struct ia64_pal_retval iprv;
964 PAL_CALL(iprv, PAL_CACHE_INIT, level, cache_type, rest);
965 return iprv.status;
975 struct ia64_pal_retval iprv;
976 PAL_CALL(iprv, PAL_CACHE_LINE_INIT, physical_addr, data_value, 0);
977 return iprv.status;
985 struct ia64_pal_retval iprv;
986 PAL_CALL_PHYS_STK(iprv, PAL_CACHE_READ, line_id.pclid_data,
988 return iprv.status;
995 struct ia64_pal_retval iprv;
996 PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0);
998 *cache_levels = iprv.v0;
1000 *unique_caches = iprv.v1;
1001 return iprv.status;
1008 struct ia64_pal_retval iprv;
1009 PAL_CALL_PHYS_STK(iprv, PAL_CACHE_WRITE, line_id.pclid_data,
1011 return iprv.status;
1020 struct ia64_pal_retval iprv;
1021 PAL_CALL(iprv, PAL_COPY_INFO, copy_type, num_procs, num_iopics);
1023 *buffer_size = iprv.v0;
1025 *buffer_align = iprv.v1;
1026 return iprv.status;
1033 struct ia64_pal_retval iprv;
1034 PAL_CALL(iprv, PAL_COPY_PAL, target_addr, alloc_size, processor);
1036 *pal_proc_offset = iprv.v0;
1037 return iprv.status;
1044 struct ia64_pal_retval iprv;
1045 PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0);
1047 *inst_regs = iprv.v0;
1049 *data_regs = iprv.v1;
1051 return iprv.status;
1059 struct ia64_pal_retval iprv;
1060 PAL_CALL(iprv, PAL_ENTER_IA_32_ENV, ia32_env1, ia32_env2, ia32_env3);
1061 return iprv.status;
1069 struct ia64_pal_retval iprv;
1070 PAL_CALL(iprv, PAL_FIXED_ADDR, 0, 0, 0);
1072 *global_unique_addr = iprv.v0;
1073 return iprv.status;
1079 struct ia64_pal_retval iprv;
1080 PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0);
1082 *platform_base_freq = iprv.v0;
1083 return iprv.status;
1094 struct ia64_pal_retval iprv;
1095 PAL_CALL(iprv, PAL_FREQ_RATIOS, 0, 0, 0);
1097 *(u64 *)proc_ratio = iprv.v0;
1099 *(u64 *)bus_ratio = iprv.v1;
1101 *(u64 *)itc_ratio = iprv.v2;
1102 return iprv.status;
1112 struct ia64_pal_retval iprv;
1113 PAL_CALL(iprv, PAL_GET_HW_POLICY, proc_num, 0, 0);
1115 *cur_policy = iprv.v0;
1117 *num_impacted = iprv.v1;
1119 *la = iprv.v2;
1120 return iprv.status;
1130 struct ia64_pal_retval iprv;
1131 PAL_CALL(iprv, PAL_HALT, halt_state, 0, 0);
1132 return iprv.status;
1151 struct ia64_pal_retval iprv;
1152 PAL_CALL_STK(iprv, PAL_HALT_INFO, (unsigned long) power_buf, 0, 0);
1153 return iprv.status;
1160 struct ia64_pal_retval iprv;
1161 PAL_CALL_STK(iprv, PAL_GET_PSTATE, type, 0, 0);
1162 *pstate_index = iprv.v0;
1163 return iprv.status;
1170 struct ia64_pal_retval iprv;
1171 PAL_CALL_STK(iprv, PAL_SET_PSTATE, pstate_index, 0, 0);
1172 return iprv.status;
1179 struct ia64_pal_retval iprv;
1180 PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0);
1181 return iprv.status;
1190 struct ia64_pal_retval iprv;
1191 PAL_CALL(iprv, PAL_HALT_LIGHT, 0, 0, 0);
1192 return iprv.status;
1202 struct ia64_pal_retval iprv;
1203 PAL_CALL(iprv, PAL_MC_CLEAR_LOG, 0, 0, 0);
1205 *pending_vector = iprv.v0;
1206 return iprv.status;
1215 struct ia64_pal_retval iprv;
1216 PAL_CALL(iprv, PAL_MC_DRAIN, 0, 0, 0);
1217 return iprv.status;
1224 struct ia64_pal_retval iprv;
1225 PAL_CALL(iprv, PAL_MC_DYNAMIC_STATE, info_type, dy_buffer, 0);
1227 *size = iprv.v0;
1228 return iprv.status;
1235 struct ia64_pal_retval iprv;
1236 PAL_CALL(iprv, PAL_MC_ERROR_INFO, info_index, type_index, 0);
1238 *size = iprv.v0;
1240 *error_info = iprv.v1;
1241 return iprv.status;
1251 struct ia64_pal_retval iprv;
1252 PAL_CALL_PHYS_STK(iprv, PAL_MC_ERROR_INJECT, err_type_info,
1255 *capabilities= iprv.v0;
1257 *resources= iprv.v1;
1258 return iprv.status;
1265 struct ia64_pal_retval iprv;
1266 PAL_CALL_STK(iprv, PAL_MC_ERROR_INJECT, err_type_info,
1269 *capabilities= iprv.v0;
1271 *resources= iprv.v1;
1272 return iprv.status;
1281 struct ia64_pal_retval iprv;
1282 PAL_CALL(iprv, PAL_MC_EXPECTED, expected, 0, 0);
1284 *previous = iprv.v0;
1285 return iprv.status;
1305 struct ia64_pal_retval iprv;
1306 PAL_CALL(iprv, PAL_MC_HW_TRACKING, 0, 0, 0);
1308 *status = iprv.v0;
1309 return iprv.status;
1319 struct ia64_pal_retval iprv;
1320 PAL_CALL(iprv, PAL_MC_REGISTER_MEM, physical_addr, size, 0);
1322 *req_size = iprv.v0;
1323 return iprv.status;
1332 struct ia64_pal_retval iprv;
1333 PAL_CALL(iprv, PAL_MC_RESUME, set_cmci, save_ptr, 0);
1334 return iprv.status;
1341 struct ia64_pal_retval iprv;
1342 PAL_CALL(iprv, PAL_MEM_ATTRIB, 0, 0, 0);
1344 *mem_attrib = iprv.v0 & 0xff;
1345 return iprv.status;
1354 struct ia64_pal_retval iprv;
1355 PAL_CALL(iprv, PAL_MEM_FOR_TEST, 0, 0, 0);
1357 *bytes_needed = iprv.v0;
1359 *alignment = iprv.v1;
1360 return iprv.status;
1380 struct ia64_pal_retval iprv;
1381 PAL_CALL(iprv, PAL_PERF_MON_INFO, (unsigned long) pm_buffer, 0, 0);
1383 pm_info->ppmi_data = iprv.v0;
1384 return iprv.status;
1393 struct ia64_pal_retval iprv;
1394 PAL_CALL(iprv, PAL_PLATFORM_ADDR, type, physical_addr, 0);
1395 return iprv.status;
1402 struct ia64_pal_retval iprv;
1403 PAL_CALL(iprv, PAL_PMI_ENTRYPOINT, sal_pmi_entry_addr, 0, 0);
1404 return iprv.status;
1415 struct ia64_pal_retval iprv;
1416 PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, features_set, 0);
1417 if (iprv.status == 0) {
1418 *features_avail = iprv.v0;
1419 *features_status = iprv.v1;
1420 *features_control = iprv.v2;
1422 return iprv.status;
1429 struct ia64_pal_retval iprv;
1430 PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES, feature_select, 0, 0);
1431 return iprv.status;
1450 struct ia64_pal_retval iprv;
1455 PAL_CALL(iprv, PAL_PTCE_INFO, 0, 0, 0);
1456 if (iprv.status == 0) {
1457 ptce->base = iprv.v0;
1458 ptce->count[0] = iprv.v1 >> 32;
1459 ptce->count[1] = iprv.v1 & 0xffffffff;
1460 ptce->stride[0] = iprv.v2 >> 32;
1461 ptce->stride[1] = iprv.v2 & 0xffffffff;
1463 return iprv.status;
1470 struct ia64_pal_retval iprv;
1471 PAL_CALL(iprv, PAL_REGISTER_INFO, info_request, 0, 0);
1473 *reg_info_1 = iprv.v0;
1475 *reg_info_2 = iprv.v1;
1476 return iprv.status;
1494 struct ia64_pal_retval iprv;
1495 PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0);
1497 *num_phys_stacked = iprv.v0;
1499 hints->ph_data = iprv.v1;
1500 return iprv.status;
1509 struct ia64_pal_retval iprv;
1510 PAL_CALL(iprv, PAL_SET_HW_POLICY, policy, 0, 0);
1511 return iprv.status;
1521 struct ia64_pal_retval iprv;
1522 PAL_CALL(iprv, PAL_SHUTDOWN, 0, 0, 0);
1523 return iprv.status;
1530 struct ia64_pal_retval iprv;
1531 PAL_CALL(iprv, PAL_TEST_PROC, test_addr, test_size, attributes);
1533 *self_test_state = iprv.v0;
1534 return iprv.status;
1560 struct ia64_pal_retval iprv;
1561 PAL_CALL_PHYS(iprv, PAL_VERSION, 0, 0, 0);
1563 pal_min_version->pal_version_val = iprv.v0;
1566 pal_cur_version->pal_version_val = iprv.v1;
1568 return iprv.status;
1598 struct ia64_pal_retval iprv;
1599 PAL_CALL(iprv, PAL_VM_INFO, tc_level, tc_type, 0);
1601 tc_info->pti_val = iprv.v0;
1603 *tc_pages = iprv.v1;
1604 return iprv.status;
1612 struct ia64_pal_retval iprv;
1613 PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0);
1615 *tr_pages = iprv.v0;
1617 *vw_pages = iprv.v1;
1618 return iprv.status;
1654 struct ia64_pal_retval iprv;
1655 PAL_CALL(iprv, PAL_VM_SUMMARY, 0, 0, 0);
1657 vm_info_1->pvi1_val = iprv.v0;
1659 vm_info_2->pvi2_val = iprv.v1;
1660 return iprv.status;
1677 struct ia64_pal_retval iprv;
1678 PAL_CALL(iprv, PAL_VP_INFO, feature_set, vp_buffer, 0);
1680 *vp_info = iprv.v0;
1682 *vmm_id = iprv.v1;
1683 return iprv.status;
1701 struct ia64_pal_retval iprv;
1702 PAL_CALL_PHYS_STK(iprv, PAL_VM_TR_READ, reg_num, tr_type,(u64)ia64_tpa(tr_buffer));
1704 tr_valid->piv_val = iprv.v0;
1705 return iprv.status;
1725 struct ia64_pal_retval iprv;
1726 PAL_CALL(iprv, PAL_PREFETCH_VISIBILITY, trans_type, 0, 0);
1727 return iprv.status;
1783 struct ia64_pal_retval iprv;
1785 PAL_CALL(iprv, PAL_LOGICAL_TO_PHYSICAL, proc_number, 0, 0);
1787 if (iprv.status == PAL_STATUS_SUCCESS)
1789 mapping->overview.overview_data = iprv.v0;
1790 mapping->ppli1.ppli1_data = iprv.v1;
1791 mapping->ppli2.ppli2_data = iprv.v2;
1794 return iprv.status;
1811 struct ia64_pal_retval iprv;
1813 PAL_CALL(iprv, PAL_CACHE_SHARED_INFO, level, type, proc_number);
1815 if (iprv.status == PAL_STATUS_SUCCESS) {
1816 info->num_shared = iprv.v0;
1817 info->ppli1.ppli1_data = iprv.v1;
1818 info->ppli2.ppli2_data = iprv.v2;
1821 return iprv.status;