Lines Matching refs:__IA64_UL
80 #define IA64_PSR_BE (__IA64_UL(1) << IA64_PSR_BE_BIT)
81 #define IA64_PSR_UP (__IA64_UL(1) << IA64_PSR_UP_BIT)
82 #define IA64_PSR_AC (__IA64_UL(1) << IA64_PSR_AC_BIT)
83 #define IA64_PSR_MFL (__IA64_UL(1) << IA64_PSR_MFL_BIT)
84 #define IA64_PSR_MFH (__IA64_UL(1) << IA64_PSR_MFH_BIT)
85 #define IA64_PSR_IC (__IA64_UL(1) << IA64_PSR_IC_BIT)
86 #define IA64_PSR_I (__IA64_UL(1) << IA64_PSR_I_BIT)
87 #define IA64_PSR_PK (__IA64_UL(1) << IA64_PSR_PK_BIT)
88 #define IA64_PSR_DT (__IA64_UL(1) << IA64_PSR_DT_BIT)
89 #define IA64_PSR_DFL (__IA64_UL(1) << IA64_PSR_DFL_BIT)
90 #define IA64_PSR_DFH (__IA64_UL(1) << IA64_PSR_DFH_BIT)
91 #define IA64_PSR_SP (__IA64_UL(1) << IA64_PSR_SP_BIT)
92 #define IA64_PSR_PP (__IA64_UL(1) << IA64_PSR_PP_BIT)
93 #define IA64_PSR_DI (__IA64_UL(1) << IA64_PSR_DI_BIT)
94 #define IA64_PSR_SI (__IA64_UL(1) << IA64_PSR_SI_BIT)
95 #define IA64_PSR_DB (__IA64_UL(1) << IA64_PSR_DB_BIT)
96 #define IA64_PSR_LP (__IA64_UL(1) << IA64_PSR_LP_BIT)
97 #define IA64_PSR_TB (__IA64_UL(1) << IA64_PSR_TB_BIT)
98 #define IA64_PSR_RT (__IA64_UL(1) << IA64_PSR_RT_BIT)
100 #define IA64_PSR_CPL (__IA64_UL(3) << IA64_PSR_CPL0_BIT)
101 #define IA64_PSR_IS (__IA64_UL(1) << IA64_PSR_IS_BIT)
102 #define IA64_PSR_MC (__IA64_UL(1) << IA64_PSR_MC_BIT)
103 #define IA64_PSR_IT (__IA64_UL(1) << IA64_PSR_IT_BIT)
104 #define IA64_PSR_ID (__IA64_UL(1) << IA64_PSR_ID_BIT)
105 #define IA64_PSR_DA (__IA64_UL(1) << IA64_PSR_DA_BIT)
106 #define IA64_PSR_DD (__IA64_UL(1) << IA64_PSR_DD_BIT)
107 #define IA64_PSR_SS (__IA64_UL(1) << IA64_PSR_SS_BIT)
108 #define IA64_PSR_RI (__IA64_UL(3) << IA64_PSR_RI_BIT)
109 #define IA64_PSR_ED (__IA64_UL(1) << IA64_PSR_ED_BIT)
110 #define IA64_PSR_BN (__IA64_UL(1) << IA64_PSR_BN_BIT)
111 #define IA64_PSR_IA (__IA64_UL(1) << IA64_PSR_IA_BIT)
128 #define IA64_DCR_PP (__IA64_UL(1) << IA64_DCR_PP_BIT)
129 #define IA64_DCR_BE (__IA64_UL(1) << IA64_DCR_BE_BIT)
130 #define IA64_DCR_LC (__IA64_UL(1) << IA64_DCR_LC_BIT)
131 #define IA64_DCR_DM (__IA64_UL(1) << IA64_DCR_DM_BIT)
132 #define IA64_DCR_DP (__IA64_UL(1) << IA64_DCR_DP_BIT)
133 #define IA64_DCR_DK (__IA64_UL(1) << IA64_DCR_DK_BIT)
134 #define IA64_DCR_DX (__IA64_UL(1) << IA64_DCR_DX_BIT)
135 #define IA64_DCR_DR (__IA64_UL(1) << IA64_DCR_DR_BIT)
136 #define IA64_DCR_DA (__IA64_UL(1) << IA64_DCR_DA_BIT)
137 #define IA64_DCR_DD (__IA64_UL(1) << IA64_DCR_DD_BIT)
149 #define IA64_ISR_X (__IA64_UL(1) << IA64_ISR_X_BIT)
150 #define IA64_ISR_W (__IA64_UL(1) << IA64_ISR_W_BIT)
151 #define IA64_ISR_R (__IA64_UL(1) << IA64_ISR_R_BIT)
152 #define IA64_ISR_NA (__IA64_UL(1) << IA64_ISR_NA_BIT)
153 #define IA64_ISR_SP (__IA64_UL(1) << IA64_ISR_SP_BIT)
154 #define IA64_ISR_RS (__IA64_UL(1) << IA64_ISR_RS_BIT)
155 #define IA64_ISR_IR (__IA64_UL(1) << IA64_ISR_IR_BIT)