Lines Matching refs:gr5
54 movsg hsr0,gr5
55 and gr4,gr5,gr5
56 movgs gr5,hsr0
57 movsg hsr0,gr5
68 movsg hsr0,gr5
69 or gr4,gr5,gr5
70 movgs gr5,hsr0
71 movsg hsr0,gr5
91 setlos #1,gr5
94 ldubu.p @(gr9,gr5),gr16
96 stbu.p gr16,@(gr6,gr5)
101 stbu gr0,@(gr6,gr5)
115 movsg psr,gr5
116 srli gr5,#28,gr5
117 subicc gr5,#3,gr0,icc0
190 add gr18,gr5,gr4 ; two cachelines probably required
216 add gr18,gr5,gr4
242 setlos #8,gr5
243 sub.p gr16,gr5,gr16 ; adjust src for LDDU
244 sub gr17,gr5,gr17 ; adjust dst for LDDU
256 lddu @(gr16,gr5),gr10
257 lddu @(gr16,gr5),gr12
258 stdu.p gr10,@(gr17,gr5)
260 stdu.p gr12,@(gr17,gr5)
293 movsg psr,gr5
294 srli gr5,#PSR_IMPLE_SHIFT,gr5
295 subicc gr5,#PSR_IMPLE_FR551,gr0,icc0
297 subicc gr5,#PSR_IMPLE_FR451,gr0,icc0
343 movsg hsr0,gr5
347 or gr4,gr5,gr5
376 or gr4,gr5,gr5
377 movgs gr5,hsr0
407 sethi.p %hi(_end),gr5
408 setlo %lo(_end),gr5
418 subcc gr5,gr4,gr0,icc0
428 sethi.p %hi(__sdram_base),gr5
429 setlo %lo(__sdram_base),gr5
432 st gr5,@(gr4,gr0)
434 add gr25,gr5,gr25
459 setlos #ISR_EDE|ISR_DTT_DIVBYZERO|ISR_EMAM_EXCEPTION,gr5
460 movgs gr5,isr
490 or gr3,gr0,gr5
574 setlos #31,gr5
577 sub.p gr5,gr6,gr6 ; bit number of highest set bit (1MB=>20)
586 or.p gr4,gr0,gr5
589 and.p gr5,gr11,gr7
594 or gr0,gr0,gr5