Lines Matching refs:tr_cfg
301 reg_sser_rw_tr_cfg tr_cfg = {0};
347 tr_cfg.urun_stop = regk_sser_no;
348 tr_cfg.sample_size = 7;
349 tr_cfg.sh_dir = regk_sser_msbfirst;
350 tr_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
351 tr_cfg.rate_ctrl = regk_sser_iso;
352 tr_cfg.data_pin_use = regk_sser_dout;
353 tr_cfg.bulk_wspace = 1;
354 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
655 reg_sser_rw_tr_cfg tr_cfg;
669 tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
822 tr_cfg.bulk_wspace = frm_cfg.tr_delay;
838 rec_cfg.sample_size = tr_cfg.sample_size = 7;
841 rec_cfg.sample_size = tr_cfg.sample_size = 11;
843 rec_cfg.sample_size = tr_cfg.sample_size = 15;
845 rec_cfg.sample_size = tr_cfg.sample_size = 23;
847 rec_cfg.sample_size = tr_cfg.sample_size = 31;
850 rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_msbfirst;
852 rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_lsbfirst;
903 rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_msbfirst;
904 rec_cfg.sample_size = tr_cfg.sample_size = 7;
936 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
1117 reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
1120 tr_cfg.tr_en = regk_sser_yes;
1123 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
1174 reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
1177 switch(tr_cfg.sample_size)
1245 reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser,
1256 tr_cfg.tr_en = regk_sser_yes;
1257 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
1389 reg_sser_rw_tr_cfg tr_cfg =
1400 tr_cfg.tr_en = regk_sser_no;
1401 REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);